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      1 //===-- AArch64TargetTransformInfo.h - AArch64 specific TTI -----*- C++ -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 /// \file
     10 /// This file a TargetTransformInfo::Concept conforming object specific to the
     11 /// AArch64 target machine. It uses the target's detailed information to
     12 /// provide more precise answers to certain TTI queries, while letting the
     13 /// target independent and default TTI implementations handle the rest.
     14 ///
     15 //===----------------------------------------------------------------------===//
     16 
     17 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64TARGETTRANSFORMINFO_H
     18 #define LLVM_LIB_TARGET_AARCH64_AARCH64TARGETTRANSFORMINFO_H
     19 
     20 #include "AArch64.h"
     21 #include "AArch64TargetMachine.h"
     22 #include "llvm/Analysis/TargetTransformInfo.h"
     23 #include "llvm/CodeGen/BasicTTIImpl.h"
     24 #include "llvm/Target/TargetLowering.h"
     25 #include <algorithm>
     26 
     27 namespace llvm {
     28 
     29 class AArch64TTIImpl : public BasicTTIImplBase<AArch64TTIImpl> {
     30   typedef BasicTTIImplBase<AArch64TTIImpl> BaseT;
     31   typedef TargetTransformInfo TTI;
     32   friend BaseT;
     33 
     34   const AArch64Subtarget *ST;
     35   const AArch64TargetLowering *TLI;
     36 
     37   /// Estimate the overhead of scalarizing an instruction. Insert and Extract
     38   /// are set if the result needs to be inserted and/or extracted from vectors.
     39   unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract);
     40 
     41   const AArch64Subtarget *getST() const { return ST; }
     42   const AArch64TargetLowering *getTLI() const { return TLI; }
     43 
     44   enum MemIntrinsicType {
     45     VECTOR_LDST_TWO_ELEMENTS,
     46     VECTOR_LDST_THREE_ELEMENTS,
     47     VECTOR_LDST_FOUR_ELEMENTS
     48   };
     49 
     50 public:
     51   explicit AArch64TTIImpl(const AArch64TargetMachine *TM, const Function &F)
     52       : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
     53         TLI(ST->getTargetLowering()) {}
     54 
     55   // Provide value semantics. MSVC requires that we spell all of these out.
     56   AArch64TTIImpl(const AArch64TTIImpl &Arg)
     57       : BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
     58   AArch64TTIImpl(AArch64TTIImpl &&Arg)
     59       : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)),
     60         TLI(std::move(Arg.TLI)) {}
     61 
     62   /// \name Scalar TTI Implementations
     63   /// @{
     64 
     65   using BaseT::getIntImmCost;
     66   int getIntImmCost(int64_t Val);
     67   int getIntImmCost(const APInt &Imm, Type *Ty);
     68   int getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty);
     69   int getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
     70                     Type *Ty);
     71   TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
     72 
     73   /// @}
     74 
     75   /// \name Vector TTI Implementations
     76   /// @{
     77 
     78   bool enableInterleavedAccessVectorization() { return true; }
     79 
     80   unsigned getNumberOfRegisters(bool Vector) {
     81     if (Vector) {
     82       if (ST->hasNEON())
     83         return 32;
     84       return 0;
     85     }
     86     return 31;
     87   }
     88 
     89   unsigned getRegisterBitWidth(bool Vector) {
     90     if (Vector) {
     91       if (ST->hasNEON())
     92         return 128;
     93       return 0;
     94     }
     95     return 64;
     96   }
     97 
     98   unsigned getMaxInterleaveFactor(unsigned VF);
     99 
    100   int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src);
    101 
    102   int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
    103 
    104   int getArithmeticInstrCost(
    105       unsigned Opcode, Type *Ty,
    106       TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
    107       TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
    108       TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
    109       TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None);
    110 
    111   int getAddressComputationCost(Type *Ty, bool IsComplex);
    112 
    113   int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy);
    114 
    115   int getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
    116                       unsigned AddressSpace);
    117 
    118   int getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys);
    119 
    120   void getUnrollingPreferences(Loop *L, TTI::UnrollingPreferences &UP);
    121 
    122   Value *getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst,
    123                                            Type *ExpectedType);
    124 
    125   bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info);
    126 
    127   int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor,
    128                                  ArrayRef<unsigned> Indices, unsigned Alignment,
    129                                  unsigned AddressSpace);
    130   /// @}
    131 };
    132 
    133 } // end namespace llvm
    134 
    135 #endif
    136