1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file defines the TargetMachine and LLVMTargetMachine classes. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_TARGET_TARGETMACHINE_H 15 #define LLVM_TARGET_TARGETMACHINE_H 16 17 #include "llvm/ADT/StringRef.h" 18 #include "llvm/ADT/Triple.h" 19 #include "llvm/IR/DataLayout.h" 20 #include "llvm/Pass.h" 21 #include "llvm/Support/CodeGen.h" 22 #include "llvm/Target/TargetOptions.h" 23 #include <cassert> 24 #include <string> 25 26 namespace llvm { 27 28 class InstrItineraryData; 29 class GlobalValue; 30 class Mangler; 31 class MachineFunctionInitializer; 32 class MCAsmInfo; 33 class MCCodeGenInfo; 34 class MCContext; 35 class MCInstrInfo; 36 class MCRegisterInfo; 37 class MCSubtargetInfo; 38 class MCSymbol; 39 class Target; 40 class DataLayout; 41 class TargetLibraryInfo; 42 class TargetFrameLowering; 43 class TargetIRAnalysis; 44 class TargetIntrinsicInfo; 45 class TargetLowering; 46 class TargetPassConfig; 47 class TargetRegisterInfo; 48 class TargetSelectionDAGInfo; 49 class TargetSubtargetInfo; 50 class TargetTransformInfo; 51 class formatted_raw_ostream; 52 class raw_ostream; 53 class raw_pwrite_stream; 54 class TargetLoweringObjectFile; 55 56 // The old pass manager infrastructure is hidden in a legacy namespace now. 57 namespace legacy { 58 class PassManagerBase; 59 } 60 using legacy::PassManagerBase; 61 62 //===----------------------------------------------------------------------===// 63 /// 64 /// Primary interface to the complete machine description for the target 65 /// machine. All target-specific information should be accessible through this 66 /// interface. 67 /// 68 class TargetMachine { 69 TargetMachine(const TargetMachine &) = delete; 70 void operator=(const TargetMachine &) = delete; 71 protected: // Can only create subclasses. 72 TargetMachine(const Target &T, StringRef DataLayoutString, 73 const Triple &TargetTriple, StringRef CPU, StringRef FS, 74 const TargetOptions &Options); 75 76 /// The Target that this machine was created for. 77 const Target &TheTarget; 78 79 /// DataLayout for the target: keep ABI type size and alignment. 80 /// 81 /// The DataLayout is created based on the string representation provided 82 /// during construction. It is kept here only to avoid reparsing the string 83 /// but should not really be used during compilation, because it has an 84 /// internal cache that is context specific. 85 const DataLayout DL; 86 87 /// Triple string, CPU name, and target feature strings the TargetMachine 88 /// instance is created with. 89 Triple TargetTriple; 90 std::string TargetCPU; 91 std::string TargetFS; 92 93 /// Low level target information such as relocation model. Non-const to 94 /// allow resetting optimization level per-function. 95 MCCodeGenInfo *CodeGenInfo; 96 97 /// Contains target specific asm information. 98 const MCAsmInfo *AsmInfo; 99 100 const MCRegisterInfo *MRI; 101 const MCInstrInfo *MII; 102 const MCSubtargetInfo *STI; 103 104 unsigned RequireStructuredCFG : 1; 105 unsigned O0WantsFastISel : 1; 106 107 /// This API is here to support the C API, deprecated in 3.7 release. 108 /// This should never be used outside of legacy existing client. 109 const DataLayout &getDataLayout() const { return DL; } 110 friend struct C_API_PRIVATE_ACCESS; 111 112 public: 113 mutable TargetOptions Options; 114 115 virtual ~TargetMachine(); 116 117 const Target &getTarget() const { return TheTarget; } 118 119 const Triple &getTargetTriple() const { return TargetTriple; } 120 StringRef getTargetCPU() const { return TargetCPU; } 121 StringRef getTargetFeatureString() const { return TargetFS; } 122 123 /// Virtual method implemented by subclasses that returns a reference to that 124 /// target's TargetSubtargetInfo-derived member variable. 125 virtual const TargetSubtargetInfo *getSubtargetImpl(const Function &) const { 126 return nullptr; 127 } 128 virtual TargetLoweringObjectFile *getObjFileLowering() const { 129 return nullptr; 130 } 131 132 /// This method returns a pointer to the specified type of 133 /// TargetSubtargetInfo. In debug builds, it verifies that the object being 134 /// returned is of the correct type. 135 template <typename STC> const STC &getSubtarget(const Function &F) const { 136 return *static_cast<const STC*>(getSubtargetImpl(F)); 137 } 138 139 /// Create a DataLayout. 140 const DataLayout createDataLayout() const { return DL; } 141 142 /// Test if a DataLayout if compatible with the CodeGen for this target. 143 /// 144 /// The LLVM Module owns a DataLayout that is used for the target independent 145 /// optimizations and code generation. This hook provides a target specific 146 /// check on the validity of this DataLayout. 147 bool isCompatibleDataLayout(const DataLayout &Candidate) const { 148 return DL == Candidate; 149 } 150 151 /// Get the pointer size for this target. 152 /// 153 /// This is the only time the DataLayout in the TargetMachine is used. 154 unsigned getPointerSize() const { return DL.getPointerSize(); } 155 156 /// \brief Reset the target options based on the function's attributes. 157 // FIXME: Remove TargetOptions that affect per-function code generation 158 // from TargetMachine. 159 void resetTargetOptions(const Function &F) const; 160 161 /// Return target specific asm information. 162 const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; } 163 164 const MCRegisterInfo *getMCRegisterInfo() const { return MRI; } 165 const MCInstrInfo *getMCInstrInfo() const { return MII; } 166 const MCSubtargetInfo *getMCSubtargetInfo() const { return STI; } 167 168 /// If intrinsic information is available, return it. If not, return null. 169 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { 170 return nullptr; 171 } 172 173 bool requiresStructuredCFG() const { return RequireStructuredCFG; } 174 void setRequiresStructuredCFG(bool Value) { RequireStructuredCFG = Value; } 175 176 /// Returns the code generation relocation model. The choices are static, PIC, 177 /// and dynamic-no-pic, and target default. 178 Reloc::Model getRelocationModel() const; 179 180 /// Returns the code model. The choices are small, kernel, medium, large, and 181 /// target default. 182 CodeModel::Model getCodeModel() const; 183 184 /// Returns the TLS model which should be used for the given global variable. 185 TLSModel::Model getTLSModel(const GlobalValue *GV) const; 186 187 /// Returns the optimization level: None, Less, Default, or Aggressive. 188 CodeGenOpt::Level getOptLevel() const; 189 190 /// \brief Overrides the optimization level. 191 void setOptLevel(CodeGenOpt::Level Level) const; 192 193 void setFastISel(bool Enable) { Options.EnableFastISel = Enable; } 194 bool getO0WantsFastISel() { return O0WantsFastISel; } 195 void setO0WantsFastISel(bool Enable) { O0WantsFastISel = Enable; } 196 197 bool shouldPrintMachineCode() const { return Options.PrintMachineCode; } 198 199 /// Returns the default value of asm verbosity. 200 /// 201 bool getAsmVerbosityDefault() const { 202 return Options.MCOptions.AsmVerbose; 203 } 204 205 bool getUniqueSectionNames() const { return Options.UniqueSectionNames; } 206 207 /// Return true if data objects should be emitted into their own section, 208 /// corresponds to -fdata-sections. 209 bool getDataSections() const { 210 return Options.DataSections; 211 } 212 213 /// Return true if functions should be emitted into their own section, 214 /// corresponding to -ffunction-sections. 215 bool getFunctionSections() const { 216 return Options.FunctionSections; 217 } 218 219 /// \brief Get a \c TargetIRAnalysis appropriate for the target. 220 /// 221 /// This is used to construct the new pass manager's target IR analysis pass, 222 /// set up appropriately for this target machine. Even the old pass manager 223 /// uses this to answer queries about the IR. 224 virtual TargetIRAnalysis getTargetIRAnalysis(); 225 226 /// These enums are meant to be passed into addPassesToEmitFile to indicate 227 /// what type of file to emit, and returned by it to indicate what type of 228 /// file could actually be made. 229 enum CodeGenFileType { 230 CGFT_AssemblyFile, 231 CGFT_ObjectFile, 232 CGFT_Null // Do not emit any output. 233 }; 234 235 /// Add passes to the specified pass manager to get the specified file 236 /// emitted. Typically this will involve several steps of code generation. 237 /// This method should return true if emission of this file type is not 238 /// supported, or false on success. 239 virtual bool addPassesToEmitFile( 240 PassManagerBase &, raw_pwrite_stream &, CodeGenFileType, 241 bool /*DisableVerify*/ = true, AnalysisID /*StartBefore*/ = nullptr, 242 AnalysisID /*StartAfter*/ = nullptr, AnalysisID /*StopAfter*/ = nullptr, 243 MachineFunctionInitializer * /*MFInitializer*/ = nullptr) { 244 return true; 245 } 246 247 /// Add passes to the specified pass manager to get machine code emitted with 248 /// the MCJIT. This method returns true if machine code is not supported. It 249 /// fills the MCContext Ctx pointer which can be used to build custom 250 /// MCStreamer. 251 /// 252 virtual bool addPassesToEmitMC(PassManagerBase &, MCContext *&, 253 raw_pwrite_stream &, 254 bool /*DisableVerify*/ = true) { 255 return true; 256 } 257 258 /// True if subtarget inserts the final scheduling pass on its own. 259 /// 260 /// Branch relaxation, which must happen after block placement, can 261 /// on some targets (e.g. SystemZ) expose additional post-RA 262 /// scheduling opportunities. 263 virtual bool targetSchedulesPostRAScheduling() const { return false; }; 264 265 void getNameWithPrefix(SmallVectorImpl<char> &Name, const GlobalValue *GV, 266 Mangler &Mang, bool MayAlwaysUsePrivate = false) const; 267 MCSymbol *getSymbol(const GlobalValue *GV, Mangler &Mang) const; 268 }; 269 270 /// This class describes a target machine that is implemented with the LLVM 271 /// target-independent code generator. 272 /// 273 class LLVMTargetMachine : public TargetMachine { 274 protected: // Can only create subclasses. 275 LLVMTargetMachine(const Target &T, StringRef DataLayoutString, 276 const Triple &TargetTriple, StringRef CPU, StringRef FS, 277 TargetOptions Options, Reloc::Model RM, CodeModel::Model CM, 278 CodeGenOpt::Level OL); 279 280 void initAsmInfo(); 281 public: 282 /// \brief Get a TargetIRAnalysis implementation for the target. 283 /// 284 /// This analysis will produce a TTI result which uses the common code 285 /// generator to answer queries about the IR. 286 TargetIRAnalysis getTargetIRAnalysis() override; 287 288 /// Create a pass configuration object to be used by addPassToEmitX methods 289 /// for generating a pipeline of CodeGen passes. 290 virtual TargetPassConfig *createPassConfig(PassManagerBase &PM); 291 292 /// Add passes to the specified pass manager to get the specified file 293 /// emitted. Typically this will involve several steps of code generation. 294 bool addPassesToEmitFile( 295 PassManagerBase &PM, raw_pwrite_stream &Out, CodeGenFileType FileType, 296 bool DisableVerify = true, AnalysisID StartBefore = nullptr, 297 AnalysisID StartAfter = nullptr, AnalysisID StopAfter = nullptr, 298 MachineFunctionInitializer *MFInitializer = nullptr) override; 299 300 /// Add passes to the specified pass manager to get machine code emitted with 301 /// the MCJIT. This method returns true if machine code is not supported. It 302 /// fills the MCContext Ctx pointer which can be used to build custom 303 /// MCStreamer. 304 bool addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx, 305 raw_pwrite_stream &OS, 306 bool DisableVerify = true) override; 307 }; 308 309 } // End llvm namespace 310 311 #endif 312
