| /external/v8/src/ic/arm64/ |
| stub-cache-arm64.cc | 137 __ Eor(scratch, scratch, flags);
|
| /external/v8/test/cctest/ |
| test-assembler-arm64.cc | 601 __ Eor(w13, w0, kWMinInt);
955 TEST(eor) {
963 __ Eor(x2, x0, Operand(x1));
964 __ Eor(w3, w0, Operand(w1, LSL, 4));
965 __ Eor(x4, x0, Operand(x1, LSL, 4));
966 __ Eor(x5, x0, Operand(x1, LSR, 1));
967 __ Eor(w6, w0, Operand(w1, ASR, 20));
968 __ Eor(x7, x0, Operand(x1, ASR, 20));
969 __ Eor(w8, w0, Operand(w1, ROR, 28));
970 __ Eor(x9, x0, Operand(x1, ROR, 28))
[all...] |
| test-disasm-arm64.cc | 131 COMPARE(dci(0x521e0400), "eor w0, w0, #0xc");
657 COMPARE(eor(w15, w16, Operand(0x00000001)),
658 "eor w15, w16, #0x1");
659 COMPARE(eor(x17, x18, Operand(0x0000000000000003L)),
660 "eor x17, x18, #0x3");
675 "eor w19, w20, #0x7ffffffe");
677 "eor x21, x22, #0x3ffffffffffffffc");
686 COMPARE(eor(wcsp, w0, Operand(31)), "eor wcsp, w0, #0x1f");
736 COMPARE(eor(w0, w1, Operand(w2)), "eor w0, w1, w2")
[all...] |
| /external/v8/src/compiler/arm64/ |
| code-generator-arm64.cc | 792 __ Eor(i.OutputRegister(), i.InputOrZeroRegister64(0),
796 __ Eor(i.OutputRegister32(), i.InputOrZeroRegister32(0),
[all...] |
| /external/vixl/test/ |
| test-assembler-a64.cc | 594 __ Eor(w13, w0, kWMinInt);
940 TEST(eor) {
947 __ Eor(x2, x0, Operand(x1));
948 __ Eor(w3, w0, Operand(w1, LSL, 4));
949 __ Eor(x4, x0, Operand(x1, LSL, 4));
950 __ Eor(x5, x0, Operand(x1, LSR, 1));
951 __ Eor(w6, w0, Operand(w1, ASR, 20));
952 __ Eor(x7, x0, Operand(x1, ASR, 20));
953 __ Eor(w8, w0, Operand(w1, ROR, 28));
954 __ Eor(x9, x0, Operand(x1, ROR, 28))
[all...] |
| test-disasm-a64.cc | 136 COMPARE(dci(0x521e0400), "eor w0, w0, #0xc");
755 COMPARE(eor(w15, w16, Operand(0x00000001)),
756 "eor w15, w16, #0x1");
757 COMPARE(eor(x17, x18, Operand(0x0000000000000003)),
758 "eor x17, x18, #0x3");
773 "eor w19, w20, #0x7ffffffe");
775 "eor x21, x22, #0x3ffffffffffffffc");
784 COMPARE(eor(wsp, w0, Operand(31)), "eor wsp, w0, #0x1f");
[all...] |
| /art/compiler/utils/arm/ |
| assembler_arm32_test.cc | 731 TEST_F(AssemblerArm32Test, Eor) {
732 T5Helper(&arm::Arm32Assembler::eor, true, "eor{cond}{s} {reg1}, {reg2}, {shift}", "eor");
736 T4Helper(&arm::Arm32Assembler::eors, true, "eor{cond}s {reg1}, {reg2}, {shift}", "eors");
|
| /external/v8/src/arm64/ |
| macro-assembler-arm64.cc | 93 case EOR:
111 case EOR:
[all...] |
| macro-assembler-arm64-inl.h | 107 void MacroAssembler::Eor(const Register& rd,
112 LogicalMacro(rd, rn, operand, EOR);
[all...] |
| macro-assembler-arm64.h | 174 inline void Eor(const Register& rd,
[all...] |
| code-stubs-arm64.cc | 493 __ Eor(result, result, 1 << Map::kIsUndetectable);
861 __ Eor(temp, temp, kDSignMask);
[all...] |
| /external/v8/src/crankshaft/arm64/ |
| lithium-codegen-arm64.cc | [all...] |
| /external/vixl/src/vixl/a64/ |
| macro-assembler-a64.h | 624 void Eor(const Register& rd,
[all...] |
| macro-assembler-a64.cc | 688 void MacroAssembler::Eor(const Register& rd,
692 LogicalMacro(rd, rn, operand, EOR);
743 case EOR:
762 case EOR:
[all...] |
| /art/compiler/optimizing/ |
| code_generator_arm64.cc | [all...] |
| /external/v8/src/full-codegen/arm64/ |
| full-codegen-arm64.cc | [all...] |
