1 /* 2 * Author: Brendan Le Foll <brendan.le.foll (at) intel.com> 3 * Copyright 2014 Intel Corporation 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a copy 6 * of this software and associated documentation files (the "Software"), to 7 * deal in the Software without restriction, including without limitation the 8 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 9 * sell copies of the Software, and to permit persons to whom the Software is 10 * furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 */ 23 24 #pragma once 25 26 /** @file 27 * 28 * This file defines the basic shared types for libmraa 29 * this file is different to common.h in that swig takes this as an input 30 */ 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 /** 37 * MRAA supported platform types 38 */ 39 typedef enum { 40 MRAA_INTEL_GALILEO_GEN1 = 0, /**< The Generation 1 Galileo platform (RevD) */ 41 MRAA_INTEL_GALILEO_GEN2 = 1, /**< The Generation 2 Galileo platform (RevG/H) */ 42 MRAA_INTEL_EDISON_FAB_C = 2, /**< The Intel Edison (FAB C) */ 43 MRAA_INTEL_DE3815 = 3, /**< The Intel DE3815 Baytrail NUC */ 44 MRAA_INTEL_MINNOWBOARD_MAX = 4, /**< The Intel Minnow Board Max */ 45 MRAA_RASPBERRY_PI = 5, /**< The different Raspberry PI Models -like A,B,A+,B+ */ 46 MRAA_BEAGLEBONE = 6, /**< The different BeagleBone Black Modes B/C */ 47 MRAA_BANANA = 7, /**< Allwinner A20 based Banana Pi and Banana Pro */ 48 MRAA_INTEL_NUC5 = 8, /**< The Intel 5th generations Broadwell NUCs */ 49 MRAA_96BOARDS = 9, /**< Linaro 96boards */ 50 MRAA_INTEL_SOFIA_3GR = 10, /**< The Intel SoFIA 3GR */ 51 52 // USB platform extenders start at 256 53 MRAA_FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */ 54 55 MRAA_NULL_PLATFORM = 98, /**< Platform with no capabilities that hosts a sub platform */ 56 MRAA_UNKNOWN_PLATFORM = 57 99 /**< An unknown platform type, typically will load INTEL_GALILEO_GEN1 */ 58 } mraa_platform_t; 59 60 /** 61 * Intel edison miniboard numbering enum 62 */ 63 typedef enum { 64 MRAA_INTEL_EDISON_MINIBOARD_J17_1 = 0, 65 MRAA_INTEL_EDISON_MINIBOARD_J17_5 = 4, 66 MRAA_INTEL_EDISON_MINIBOARD_J17_7 = 6, 67 MRAA_INTEL_EDISON_MINIBOARD_J17_8 = 7, 68 MRAA_INTEL_EDISON_MINIBOARD_J17_9 = 8, 69 MRAA_INTEL_EDISON_MINIBOARD_J17_10 = 9, 70 MRAA_INTEL_EDISON_MINIBOARD_J17_11 = 10, 71 MRAA_INTEL_EDISON_MINIBOARD_J17_12 = 11, 72 MRAA_INTEL_EDISON_MINIBOARD_J17_14 = 13, 73 MRAA_INTEL_EDISON_MINIBOARD_J18_1 = 14, 74 MRAA_INTEL_EDISON_MINIBOARD_J18_2 = 15, 75 MRAA_INTEL_EDISON_MINIBOARD_J18_6 = 19, 76 MRAA_INTEL_EDISON_MINIBOARD_J18_7 = 20, 77 MRAA_INTEL_EDISON_MINIBOARD_J18_8 = 21, 78 MRAA_INTEL_EDISON_MINIBOARD_J18_10 = 23, 79 MRAA_INTEL_EDISON_MINIBOARD_J18_11 = 24, 80 MRAA_INTEL_EDISON_MINIBOARD_J18_12 = 25, 81 MRAA_INTEL_EDISON_MINIBOARD_J18_13 = 26, 82 MRAA_INTEL_EDISON_MINIBOARD_J19_4 = 31, 83 MRAA_INTEL_EDISON_MINIBOARD_J19_5 = 32, 84 MRAA_INTEL_EDISON_MINIBOARD_J19_6 = 33, 85 MRAA_INTEL_EDISON_MINIBOARD_J19_8 = 35, 86 MRAA_INTEL_EDISON_MINIBOARD_J19_9 = 36, 87 MRAA_INTEL_EDISON_MINIBOARD_J19_10 = 37, 88 MRAA_INTEL_EDISON_MINIBOARD_J19_11 = 38, 89 MRAA_INTEL_EDISON_MINIBOARD_J19_12 = 39, 90 MRAA_INTEL_EDISON_MINIBOARD_J19_13 = 40, 91 MRAA_INTEL_EDISON_MINIBOARD_J19_14 = 41, 92 MRAA_INTEL_EDISON_MINIBOARD_J20_3 = 44, 93 MRAA_INTEL_EDISON_MINIBOARD_J20_4 = 45, 94 MRAA_INTEL_EDISON_MINIBOARD_J20_5 = 46, 95 MRAA_INTEL_EDISON_MINIBOARD_J20_6 = 47, 96 MRAA_INTEL_EDISON_MINIBOARD_J20_7 = 48, 97 MRAA_INTEL_EDISON_MINIBOARD_J20_8 = 49, 98 MRAA_INTEL_EDISON_MINIBOARD_J20_9 = 50, 99 MRAA_INTEL_EDISON_MINIBOARD_J20_10 = 51, 100 MRAA_INTEL_EDISON_MINIBOARD_J20_11 = 52, 101 MRAA_INTEL_EDISON_MINIBOARD_J20_12 = 53, 102 MRAA_INTEL_EDISON_MINIBOARD_J20_13 = 54, 103 MRAA_INTEL_EDISON_MINIBOARD_J20_14 = 55 104 } mraa_intel_edison_miniboard_t; 105 106 /** 107 * Intel Edison raw GPIO numbering enum 108 */ 109 typedef enum { 110 MRAA_INTEL_EDISON_GP182 = 0, 111 MRAA_INTEL_EDISON_GP135 = 4, 112 MRAA_INTEL_EDISON_GP27 = 6, 113 MRAA_INTEL_EDISON_GP20 = 7, 114 MRAA_INTEL_EDISON_GP28 = 8, 115 MRAA_INTEL_EDISON_GP111 = 0, 116 MRAA_INTEL_EDISON_GP109 = 10, 117 MRAA_INTEL_EDISON_GP115 = 11, 118 MRAA_INTEL_EDISON_GP128 = 13, 119 MRAA_INTEL_EDISON_GP13 = 14, 120 MRAA_INTEL_EDISON_GP165 = 15, 121 MRAA_INTEL_EDISON_GP19 = 19, 122 MRAA_INTEL_EDISON_GP12 = 20, 123 MRAA_INTEL_EDISON_GP183 = 21, 124 MRAA_INTEL_EDISON_GP110 = 23, 125 MRAA_INTEL_EDISON_GP114 = 24, 126 MRAA_INTEL_EDISON_GP129 = 25, 127 MRAA_INTEL_EDISON_GP130 = 26, 128 MRAA_INTEL_EDISON_GP44 = 31, 129 MRAA_INTEL_EDISON_GP46 = 32, 130 MRAA_INTEL_EDISON_GP48 = 33, 131 MRAA_INTEL_EDISON_GP131 = 35, 132 MRAA_INTEL_EDISON_GP14 = 36, 133 MRAA_INTEL_EDISON_GP40 = 37, 134 MRAA_INTEL_EDISON_GP43 = 38, 135 MRAA_INTEL_EDISON_GP77 = 39, 136 MRAA_INTEL_EDISON_GP82 = 40, 137 MRAA_INTEL_EDISON_GP83 = 41, 138 MRAA_INTEL_EDISON_GP134 = 44, 139 MRAA_INTEL_EDISON_GP45 = 45, 140 MRAA_INTEL_EDISON_GP47 = 46, 141 MRAA_INTEL_EDISON_GP49 = 47, 142 MRAA_INTEL_EDISON_GP15 = 48, 143 MRAA_INTEL_EDISON_GP84 = 49, 144 MRAA_INTEL_EDISON_GP42 = 50, 145 MRAA_INTEL_EDISON_GP41 = 51, 146 MRAA_INTEL_EDISON_GP78 = 52, 147 MRAA_INTEL_EDISON_GP79 = 53, 148 MRAA_INTEL_EDISON_GP80 = 54, 149 MRAA_INTEL_EDISON_GP81 = 55 150 } mraa_intel_edison_t; 151 152 /** 153 * Raspberry PI Wiring compatible numbering enum 154 */ 155 typedef enum { 156 MRAA_RASPBERRY_WIRING_PIN8 = 3, 157 MRAA_RASPBERRY_WIRING_PIN9 = 5, 158 MRAA_RASPBERRY_WIRING_PIN7 = 7, 159 MRAA_RASPBERRY_WIRING_PIN15 = 8, 160 MRAA_RASPBERRY_WIRING_PIN16 = 10, 161 MRAA_RASPBERRY_WIRING_PIN0 = 11, 162 MRAA_RASPBERRY_WIRING_PIN1 = 12, 163 MRAA_RASPBERRY_WIRING_PIN2 = 13, 164 MRAA_RASPBERRY_WIRING_PIN3 = 15, 165 MRAA_RASPBERRY_WIRING_PIN4 = 16, 166 MRAA_RASPBERRY_WIRING_PIN5 = 18, 167 MRAA_RASPBERRY_WIRING_PIN12 = 19, 168 MRAA_RASPBERRY_WIRING_PIN13 = 21, 169 MRAA_RASPBERRY_WIRING_PIN6 = 22, 170 MRAA_RASPBERRY_WIRING_PIN14 = 23, 171 MRAA_RASPBERRY_WIRING_PIN10 = 24, 172 MRAA_RASPBERRY_WIRING_PIN11 = 26, 173 MRAA_RASPBERRY_WIRING_PIN17 = 29, // RPi B V2 174 MRAA_RASPBERRY_WIRING_PIN21 = 29, 175 MRAA_RASPBERRY_WIRING_PIN18 = 30, // RPi B V2 176 MRAA_RASPBERRY_WIRING_PIN19 = 31, // RPI B V2 177 MRAA_RASPBERRY_WIRING_PIN22 = 31, 178 MRAA_RASPBERRY_WIRING_PIN20 = 32, // RPi B V2 179 MRAA_RASPBERRY_WIRING_PIN26 = 32, 180 MRAA_RASPBERRY_WIRING_PIN23 = 33, 181 MRAA_RASPBERRY_WIRING_PIN24 = 35, 182 MRAA_RASPBERRY_WIRING_PIN27 = 36, 183 MRAA_RASPBERRY_WIRING_PIN25 = 37, 184 MRAA_RASPBERRY_WIRING_PIN28 = 38, 185 MRAA_RASPBERRY_WIRING_PIN29 = 40 186 } mraa_raspberry_wiring_t; 187 188 /** 189 * MRAA return codes 190 */ 191 typedef enum { 192 MRAA_SUCCESS = 0, /**< Expected response */ 193 MRAA_ERROR_FEATURE_NOT_IMPLEMENTED = 1, /**< Feature TODO */ 194 MRAA_ERROR_FEATURE_NOT_SUPPORTED = 2, /**< Feature not supported by HW */ 195 MRAA_ERROR_INVALID_VERBOSITY_LEVEL = 3, /**< Verbosity level wrong */ 196 MRAA_ERROR_INVALID_PARAMETER = 4, /**< Parameter invalid */ 197 MRAA_ERROR_INVALID_HANDLE = 5, /**< Handle invalid */ 198 MRAA_ERROR_NO_RESOURCES = 6, /**< No resource of that type avail */ 199 MRAA_ERROR_INVALID_RESOURCE = 7, /**< Resource invalid */ 200 MRAA_ERROR_INVALID_QUEUE_TYPE = 8, /**< Queue type incorrect */ 201 MRAA_ERROR_NO_DATA_AVAILABLE = 9, /**< No data available */ 202 MRAA_ERROR_INVALID_PLATFORM = 10, /**< Platform not recognised */ 203 MRAA_ERROR_PLATFORM_NOT_INITIALISED = 11, /**< Board information not initialised */ 204 MRAA_ERROR_PLATFORM_ALREADY_INITIALISED = 12, /**< Board is already initialised */ 205 206 MRAA_ERROR_UNSPECIFIED = 99 /**< Unknown Error */ 207 } mraa_result_t; 208 209 /** 210 * Enum representing different possible modes for a pin. 211 */ 212 typedef enum { 213 MRAA_PIN_VALID = 0, /**< Pin Valid */ 214 MRAA_PIN_GPIO = 1, /**< General Purpose IO */ 215 MRAA_PIN_PWM = 2, /**< Pulse Width Modulation */ 216 MRAA_PIN_FAST_GPIO = 3, /**< Faster GPIO */ 217 MRAA_PIN_SPI = 4, /**< SPI */ 218 MRAA_PIN_I2C = 5, /**< I2C */ 219 MRAA_PIN_AIO = 6, /**< Analog in */ 220 MRAA_PIN_UART = 7 /**< UART */ 221 } mraa_pinmodes_t; 222 223 /** 224 * Enum reprensenting different i2c speeds/modes 225 */ 226 typedef enum { 227 MRAA_I2C_STD = 0, /**< up to 100Khz */ 228 MRAA_I2C_FAST = 1, /**< up to 400Khz */ 229 MRAA_I2C_HIGH = 2 /**< up to 3.4Mhz */ 230 } mraa_i2c_mode_t; 231 232 typedef enum { 233 MRAA_UART_PARITY_NONE = 0, 234 MRAA_UART_PARITY_EVEN = 1, 235 MRAA_UART_PARITY_ODD = 2, 236 MRAA_UART_PARITY_MARK = 3, 237 MRAA_UART_PARITY_SPACE = 4 238 } mraa_uart_parity_t; 239 240 241 242 #ifdef __cplusplus 243 } 244 #endif 245
