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      1 //===-- AArch64MCTargetDesc.cpp - AArch64 Target Descriptions ---*- C++ -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file provides AArch64 specific target descriptions.
     11 //
     12 //===----------------------------------------------------------------------===//
     13 
     14 #include "AArch64MCTargetDesc.h"
     15 #include "AArch64ELFStreamer.h"
     16 #include "AArch64MCAsmInfo.h"
     17 #include "InstPrinter/AArch64InstPrinter.h"
     18 #include "llvm/MC/MCCodeGenInfo.h"
     19 #include "llvm/MC/MCInstrInfo.h"
     20 #include "llvm/MC/MCRegisterInfo.h"
     21 #include "llvm/MC/MCStreamer.h"
     22 #include "llvm/MC/MCSubtargetInfo.h"
     23 #include "llvm/Support/ErrorHandling.h"
     24 #include "llvm/Support/TargetRegistry.h"
     25 
     26 using namespace llvm;
     27 
     28 #define GET_INSTRINFO_MC_DESC
     29 #include "AArch64GenInstrInfo.inc"
     30 
     31 #define GET_SUBTARGETINFO_MC_DESC
     32 #include "AArch64GenSubtargetInfo.inc"
     33 
     34 #define GET_REGINFO_MC_DESC
     35 #include "AArch64GenRegisterInfo.inc"
     36 
     37 static MCInstrInfo *createAArch64MCInstrInfo() {
     38   MCInstrInfo *X = new MCInstrInfo();
     39   InitAArch64MCInstrInfo(X);
     40   return X;
     41 }
     42 
     43 static MCSubtargetInfo *
     44 createAArch64MCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) {
     45   if (CPU.empty())
     46     CPU = "generic";
     47 
     48   return createAArch64MCSubtargetInfoImpl(TT, CPU, FS);
     49 }
     50 
     51 static MCRegisterInfo *createAArch64MCRegisterInfo(const Triple &Triple) {
     52   MCRegisterInfo *X = new MCRegisterInfo();
     53   InitAArch64MCRegisterInfo(X, AArch64::LR);
     54   return X;
     55 }
     56 
     57 static MCAsmInfo *createAArch64MCAsmInfo(const MCRegisterInfo &MRI,
     58                                          const Triple &TheTriple) {
     59   MCAsmInfo *MAI;
     60   if (TheTriple.isOSBinFormatMachO())
     61     MAI = new AArch64MCAsmInfoDarwin();
     62   else {
     63     assert(TheTriple.isOSBinFormatELF() && "Only expect Darwin or ELF");
     64     MAI = new AArch64MCAsmInfoELF(TheTriple);
     65   }
     66 
     67   // Initial state of the frame pointer is SP.
     68   unsigned Reg = MRI.getDwarfRegNum(AArch64::SP, true);
     69   MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 0);
     70   MAI->addInitialFrameState(Inst);
     71 
     72   return MAI;
     73 }
     74 
     75 static MCCodeGenInfo *createAArch64MCCodeGenInfo(const Triple &TT,
     76                                                  Reloc::Model RM,
     77                                                  CodeModel::Model CM,
     78                                                  CodeGenOpt::Level OL) {
     79   assert((TT.isOSBinFormatELF() || TT.isOSBinFormatMachO()) &&
     80          "Only expect Darwin and ELF targets");
     81 
     82   if (CM == CodeModel::Default)
     83     CM = CodeModel::Small;
     84   // The default MCJIT memory managers make no guarantees about where they can
     85   // find an executable page; JITed code needs to be able to refer to globals
     86   // no matter how far away they are.
     87   else if (CM == CodeModel::JITDefault)
     88     CM = CodeModel::Large;
     89   else if (CM != CodeModel::Small && CM != CodeModel::Large)
     90     report_fatal_error(
     91         "Only small and large code models are allowed on AArch64");
     92 
     93   // AArch64 Darwin is always PIC.
     94   if (TT.isOSDarwin())
     95     RM = Reloc::PIC_;
     96   // On ELF platforms the default static relocation model has a smart enough
     97   // linker to cope with referencing external symbols defined in a shared
     98   // library. Hence DynamicNoPIC doesn't need to be promoted to PIC.
     99   else if (RM == Reloc::Default || RM == Reloc::DynamicNoPIC)
    100     RM = Reloc::Static;
    101 
    102   MCCodeGenInfo *X = new MCCodeGenInfo();
    103   X->initMCCodeGenInfo(RM, CM, OL);
    104   return X;
    105 }
    106 
    107 static MCInstPrinter *createAArch64MCInstPrinter(const Triple &T,
    108                                                  unsigned SyntaxVariant,
    109                                                  const MCAsmInfo &MAI,
    110                                                  const MCInstrInfo &MII,
    111                                                  const MCRegisterInfo &MRI) {
    112   if (SyntaxVariant == 0)
    113     return new AArch64InstPrinter(MAI, MII, MRI);
    114   if (SyntaxVariant == 1)
    115     return new AArch64AppleInstPrinter(MAI, MII, MRI);
    116 
    117   return nullptr;
    118 }
    119 
    120 static MCStreamer *createELFStreamer(const Triple &T, MCContext &Ctx,
    121                                      MCAsmBackend &TAB, raw_pwrite_stream &OS,
    122                                      MCCodeEmitter *Emitter, bool RelaxAll) {
    123   return createAArch64ELFStreamer(Ctx, TAB, OS, Emitter, RelaxAll);
    124 }
    125 
    126 static MCStreamer *createMachOStreamer(MCContext &Ctx, MCAsmBackend &TAB,
    127                                        raw_pwrite_stream &OS,
    128                                        MCCodeEmitter *Emitter, bool RelaxAll,
    129                                        bool DWARFMustBeAtTheEnd) {
    130   return createMachOStreamer(Ctx, TAB, OS, Emitter, RelaxAll,
    131                              DWARFMustBeAtTheEnd,
    132                              /*LabelSections*/ true);
    133 }
    134 
    135 // Force static initialization.
    136 extern "C" void LLVMInitializeAArch64TargetMC() {
    137   for (Target *T :
    138        {&TheAArch64leTarget, &TheAArch64beTarget, &TheARM64Target}) {
    139     // Register the MC asm info.
    140     RegisterMCAsmInfoFn X(*T, createAArch64MCAsmInfo);
    141 
    142     // Register the MC codegen info.
    143     TargetRegistry::RegisterMCCodeGenInfo(*T, createAArch64MCCodeGenInfo);
    144 
    145     // Register the MC instruction info.
    146     TargetRegistry::RegisterMCInstrInfo(*T, createAArch64MCInstrInfo);
    147 
    148     // Register the MC register info.
    149     TargetRegistry::RegisterMCRegInfo(*T, createAArch64MCRegisterInfo);
    150 
    151     // Register the MC subtarget info.
    152     TargetRegistry::RegisterMCSubtargetInfo(*T, createAArch64MCSubtargetInfo);
    153 
    154     // Register the MC Code Emitter
    155     TargetRegistry::RegisterMCCodeEmitter(*T, createAArch64MCCodeEmitter);
    156 
    157     // Register the obj streamers.
    158     TargetRegistry::RegisterELFStreamer(*T, createELFStreamer);
    159     TargetRegistry::RegisterMachOStreamer(*T, createMachOStreamer);
    160 
    161     // Register the obj target streamer.
    162     TargetRegistry::RegisterObjectTargetStreamer(
    163         *T, createAArch64ObjectTargetStreamer);
    164 
    165     // Register the asm streamer.
    166     TargetRegistry::RegisterAsmTargetStreamer(*T,
    167                                               createAArch64AsmTargetStreamer);
    168     // Register the MCInstPrinter.
    169     TargetRegistry::RegisterMCInstPrinter(*T, createAArch64MCInstPrinter);
    170   }
    171 
    172   // Register the asm backend.
    173   for (Target *T : {&TheAArch64leTarget, &TheARM64Target})
    174     TargetRegistry::RegisterMCAsmBackend(*T, createAArch64leAsmBackend);
    175   TargetRegistry::RegisterMCAsmBackend(TheAArch64beTarget,
    176                                        createAArch64beAsmBackend);
    177 }
    178