/art/compiler/trampolines/ |
trampoline_compiler.cc | 58 __ LoadFromOffset(kLoadWord, PC, R0, offset.Int32Value()); 61 __ LoadFromOffset(kLoadWord, IP, R0, JNIEnvExt::SelfOffset(4).Int32Value()); 62 __ LoadFromOffset(kLoadWord, PC, IP, offset.Int32Value()); 65 __ LoadFromOffset(kLoadWord, PC, R9, offset.Int32Value()); 127 __ LoadFromOffset(kLoadWord, T9, A0, offset.Int32Value()); 130 __ LoadFromOffset(kLoadWord, T9, A0, JNIEnvExt::SelfOffset(4).Int32Value()); 131 __ LoadFromOffset(kLoadWord, T9, T9, offset.Int32Value()); 134 __ LoadFromOffset(kLoadWord, T9, S1, offset.Int32Value());
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/art/compiler/utils/arm/ |
assembler_arm.cc | 306 case kLoadWord: 341 case kLoadWord: 526 LoadFromOffset(kLoadWord, scratch.AsCoreRegister(), SP, in_off.Int32Value()); 533 LoadFromOffset(kLoadWord, scratch.AsCoreRegister(), SP, src.Int32Value()); 541 LoadFromOffset(kLoadWord, dst.AsCoreRegister(), 551 LoadFromOffset(kLoadWord, dst.AsCoreRegister(), SP, src.Int32Value()); 558 LoadFromOffset(kLoadWord, dst.AsCoreRegister(), 585 assembler->LoadFromOffset(kLoadWord, dst.AsCoreRegister(), src_register, src_offset); 588 assembler->LoadFromOffset(kLoadWord, dst.AsRegisterPairLow(), src_register, src_offset); 589 assembler->LoadFromOffset(kLoadWord, dst.AsRegisterPairHigh(), src_register, src_offset + 4) [all...] |
assembler_arm.h | 223 kLoadWord, [all...] |
assembler_arm32.cc | [all...] |
assembler_thumb2.cc | [all...] |
/art/compiler/utils/mips64/ |
assembler_mips64_test.cc | [all...] |
assembler_mips64.cc | [all...] |
assembler_mips64.h | 42 kLoadWord,
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/art/compiler/utils/arm64/ |
assembler_arm64.cc | 235 case kLoadWord: 295 LoadWFromOffset(kLoadWord, dst.AsOverlappingWRegister(), SP, offs.Int32Value()); 303 LoadWFromOffset(kLoadWord, dst.AsOverlappingWRegister(), base.AsXRegister(), 379 LoadWFromOffset(kLoadWord, scratch.AsOverlappingWRegister(), 391 LoadWFromOffset(kLoadWord, scratch.AsOverlappingWRegister(), SP, src.Int32Value()); 409 LoadWFromOffset(kLoadWord, scratch.AsWRegister(), base.AsXRegister(), 428 LoadWFromOffset(kLoadWord, scratch.AsWRegister(), SP, src.Int32Value()); 456 LoadWFromOffset(kLoadWord, scratch.AsWRegister(), src.AsXRegister(), 461 LoadWFromOffset(kLoadWord, scratch.AsOverlappingWRegister(), src.AsXRegister(), 562 LoadWFromOffset(kLoadWord, out_reg.AsOverlappingWRegister(), SP [all...] |
assembler_arm64.h | 50 kLoadWord,
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/art/compiler/optimizing/ |
intrinsics_arm.cc | 494 __ LoadFromOffset(kLoadWord, [all...] |
code_generator_mips.cc | 611 __ LoadFromOffset(kLoadWord, reg, SP, offset); 624 __ LoadFromOffset(kLoadWord, reg_l, SP, offset_l); 627 __ LoadFromOffset(kLoadWord, reg_h, SP, offset_h); 650 __ LoadFromOffset(kLoadWord, 654 __ LoadFromOffset(kLoadWord, 678 __ LoadFromOffset(kLoadWord, 835 __ LoadFromOffset(kLoadWord, destination.AsRegister<Register>(), SP, source.GetStackIndex()); [all...] |
code_generator_arm.cc | 477 // __ LoadFromOffset(kLoadWord, out, out, offset); 748 __ LoadFromOffset(kLoadWord, static_cast<Register>(reg_id), SP, stack_index); [all...] |
code_generator_mips64.cc | 487 LoadOperandType load_type = double_slot ? kLoadDoubleword : kLoadWord; 524 __ LoadFromOffset(kLoadWord, 665 LoadOperandType load_type = source.IsStackSlot() ? kLoadWord : kLoadDoubleword; 784 __ LoadFromOffset(kLoadWord, TMP, SP, source.GetStackIndex()); 832 LoadOperandType load_type = mem_loc.IsStackSlot() ? kLoadWord : kLoadDoubleword; [all...] |
intrinsics_mips.cc | [all...] |
/art/compiler/utils/mips/ |
assembler_mips.cc | [all...] |
assembler_mips_test.cc | 771 __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A0, 0); 772 __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 0); 773 __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 256); 774 __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 1000); 775 __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 0x8000); 776 __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 0x10000); 777 __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 0x12345678); 778 __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, -256); 779 __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 0xFFFF8000); 780 __ LoadFromOffset(mips::kLoadWord, mips::A0, mips::A1, 0xABCDEF00) [all...] |
assembler_mips.h | 43 kLoadWord, [all...] |
/art/compiler/linker/arm/ |
relative_patcher_thumb2.cc | 86 arm::kLoadWord, arm::PC, arm::R0,
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/art/compiler/utils/ |
assembler_thumb_test.cc | 839 __ LoadFromOffset(kLoadWord, R2, R4, 12); 840 __ LoadFromOffset(kLoadWord, R2, R4, 0xfff); 841 __ LoadFromOffset(kLoadWord, R2, R4, 0x1000); 842 __ LoadFromOffset(kLoadWord, R2, R4, 0x1000a4); 843 __ LoadFromOffset(kLoadWord, R2, R4, 0x101000); 844 __ LoadFromOffset(kLoadWord, R4, R4, 0x101000); 858 __ LoadFromOffset(kLoadWord, R0, R12, 12); // 32-bit because of R12. 859 __ LoadFromOffset(kLoadWord, R2, R4, 0xa4 - 0x100000); [all...] |