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      1 // REQUIRES: aarch64-registered-target
      2 
      3 // RUN: %clang_cc1 -triple aarch64-linux-gnu -target-feature +neon \
      4 // RUN:  -target-feature +v8.1a -O3 -S -o - %s \
      5 // RUN:  | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AARCH64
      6 
      7  #include <arm_neon.h>
      8 
      9 // CHECK-AARCH64-LABEL: test_vqrdmlah_laneq_s16
     10 int16x4_t test_vqrdmlah_laneq_s16(int16x4_t a, int16x4_t b, int16x8_t v) {
     11 // CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[7]
     12   return vqrdmlah_laneq_s16(a, b, v, 7);
     13 }
     14 
     15 // CHECK-AARCH64-LABEL: test_vqrdmlah_laneq_s32
     16 int32x2_t test_vqrdmlah_laneq_s32(int32x2_t a, int32x2_t b, int32x4_t v) {
     17 // CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
     18   return vqrdmlah_laneq_s32(a, b, v, 3);
     19 }
     20 
     21 // CHECK-AARCH64-LABEL: test_vqrdmlahq_laneq_s16
     22 int16x8_t test_vqrdmlahq_laneq_s16(int16x8_t a, int16x8_t b, int16x8_t v) {
     23 // CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7]
     24   return vqrdmlahq_laneq_s16(a, b, v, 7);
     25 }
     26 
     27 // CHECK-AARCH64-LABEL: test_vqrdmlahq_laneq_s32
     28 int32x4_t test_vqrdmlahq_laneq_s32(int32x4_t a, int32x4_t b, int32x4_t v) {
     29 // CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
     30   return vqrdmlahq_laneq_s32(a, b, v, 3);
     31 }
     32 
     33 // CHECK-AARCH64-LABEL: test_vqrdmlahh_s16
     34 int16_t test_vqrdmlahh_s16(int16_t a, int16_t b, int16_t c) {
     35 // CHECK-AARCH64: sqrdmlah {{h[0-9]+|v[0-9]+.4h}}, {{h[0-9]+|v[0-9]+.4h}}, {{h[0-9]+|v[0-9]+.4h}}
     36   return vqrdmlahh_s16(a, b, c);
     37 }
     38 
     39 // CHECK-AARCH64-LABEL: test_vqrdmlahs_s32
     40 int32_t test_vqrdmlahs_s32(int32_t a, int32_t b, int32_t c) {
     41 // CHECK-AARCH64: sqrdmlah {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
     42   return vqrdmlahs_s32(a, b, c);
     43 }
     44 
     45 // CHECK-AARCH64-LABEL: test_vqrdmlahh_lane_s16
     46 int16_t test_vqrdmlahh_lane_s16(int16_t a, int16_t b, int16x4_t c) {
     47 // CHECK-AARCH64: sqrdmlah {{h[0-9]+|v[0-9]+.4h}}, {{h[0-9]+|v[0-9]+.4h}}, {{v[0-9]+}}.h[3]
     48   return vqrdmlahh_lane_s16(a, b, c, 3);
     49 }
     50 
     51 // CHECK-AARCH64-LABEL: test_vqrdmlahs_lane_s32
     52 int32_t test_vqrdmlahs_lane_s32(int32_t a, int32_t b, int32x2_t c) {
     53 // CHECK-AARCH64: sqrdmlah {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[1]
     54   return vqrdmlahs_lane_s32(a, b, c, 1);
     55 }
     56 
     57 // CHECK-AARCH64-LABEL: test_vqrdmlahh_laneq_s16
     58 int16_t test_vqrdmlahh_laneq_s16(int16_t a, int16_t b, int16x8_t c) {
     59 // CHECK-AARCH64: sqrdmlah {{h[0-9]+|v[0-9]+.4h}}, {{h[0-9]+|v[0-9]+.4h}}, {{v[0-9]+}}.h[7]
     60   return vqrdmlahh_laneq_s16(a, b, c, 7);
     61 }
     62 
     63 // CHECK-AARCH64-LABEL: test_vqrdmlahs_laneq_s32
     64 int32_t test_vqrdmlahs_laneq_s32(int32_t a, int32_t b, int32x4_t c) {
     65 // CHECK-AARCH64: sqrdmlah {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3]
     66   return vqrdmlahs_laneq_s32(a, b, c, 3);
     67 }
     68 
     69 // CHECK-AARCH64-LABEL: test_vqrdmlsh_laneq_s16
     70 int16x4_t test_vqrdmlsh_laneq_s16(int16x4_t a, int16x4_t b, int16x8_t v) {
     71 // CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[7]
     72   return vqrdmlsh_laneq_s16(a, b, v, 7);
     73 }
     74 
     75 // CHECK-AARCH64-LABEL: test_vqrdmlsh_laneq_s32
     76 int32x2_t test_vqrdmlsh_laneq_s32(int32x2_t a, int32x2_t b, int32x4_t v) {
     77 // CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[3]
     78   return vqrdmlsh_laneq_s32(a, b, v, 3);
     79 }
     80 
     81 // CHECK-AARCH64-LABEL: test_vqrdmlshq_laneq_s16
     82 int16x8_t test_vqrdmlshq_laneq_s16(int16x8_t a, int16x8_t b, int16x8_t v) {
     83 // CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[7]
     84   return vqrdmlshq_laneq_s16(a, b, v, 7);
     85 }
     86 
     87 // CHECK-AARCH64-LABEL: test_vqrdmlshq_laneq_s32
     88 int32x4_t test_vqrdmlshq_laneq_s32(int32x4_t a, int32x4_t b, int32x4_t v) {
     89 // CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[3]
     90   return vqrdmlshq_laneq_s32(a, b, v, 3);
     91 }
     92 
     93 // CHECK-AARCH64-LABEL: test_vqrdmlshh_s16
     94 int16_t test_vqrdmlshh_s16(int16_t a, int16_t b, int16_t c) {
     95 // CHECK-AARCH64: sqrdmlsh {{h[0-9]+|v[0-9]+.4h}}, {{h[0-9]+|v[0-9]+.4h}}, {{h[0-9]+|v[0-9]+.4h}}
     96   return vqrdmlshh_s16(a, b, c);
     97 }
     98 
     99 // CHECK-AARCH64-LABEL: test_vqrdmlshs_s32
    100 int32_t test_vqrdmlshs_s32(int32_t a, int32_t b, int32_t c) {
    101 // CHECK-AARCH64: sqrdmlsh {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
    102   return vqrdmlshs_s32(a, b, c);
    103 }
    104 
    105 // CHECK-AARCH64-LABEL: test_vqrdmlshh_lane_s16
    106 int16_t test_vqrdmlshh_lane_s16(int16_t a, int16_t b, int16x4_t c) {
    107 // CHECK-AARCH64: sqrdmlsh {{h[0-9]+|v[0-9]+.4h}}, {{h[0-9]+|v[0-9]+.4h}}, {{v[0-9]+}}.h[3]
    108   return vqrdmlshh_lane_s16(a, b, c, 3);
    109 }
    110 
    111 // CHECK-AARCH64-LABEL: test_vqrdmlshs_lane_s32
    112 int32_t test_vqrdmlshs_lane_s32(int32_t a, int32_t b, int32x2_t c) {
    113 // CHECK-AARCH64: sqrdmlsh {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[1]
    114   return vqrdmlshs_lane_s32(a, b, c, 1);
    115 }
    116 
    117 // CHECK-AARCH64-LABEL: test_vqrdmlshh_laneq_s16
    118 int16_t test_vqrdmlshh_laneq_s16(int16_t a, int16_t b, int16x8_t c) {
    119 // CHECK-AARCH64: sqrdmlsh {{h[0-9]+|v[0-9]+.4h}}, {{h[0-9]+|v[0-9]+.4h}}, {{v[0-9]+}}.h[7]
    120   return vqrdmlshh_laneq_s16(a, b, c, 7);
    121 }
    122 
    123 // CHECK-AARCH64-LABEL: test_vqrdmlshs_laneq_s32
    124 int32_t test_vqrdmlshs_laneq_s32(int32_t a, int32_t b, int32x4_t c) {
    125 // CHECK-AARCH64: sqrdmlsh {{s[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}}.s[3]
    126   return vqrdmlshs_laneq_s32(a, b, c, 3);
    127 }
    128 
    129