| /external/llvm/test/Transforms/InstCombine/ |
| vector_gep1.ll | 6 @G1 = global i8 zeroinitializer
15 %B = icmp ult <2 x i8*> %A, zeroinitializer
21 %B = icmp ult <2 x i8*> %g, zeroinitializer
27 %B = icmp ult <1 x i8*> %g, zeroinitializer
32 %w = getelementptr i8, <2 x i8*> %a, <2 x i32> zeroinitializer
35 %B = icmp ult <2 x i8*> %g, zeroinitializer
40 %w = getelementptr {i32, i32}, <2 x {i32, i32}*> %a, <2 x i32> <i32 5, i32 9>, <2 x i32> zeroinitializer
|
| pr12338.ll | 10 %phi3 = sub <1 x i32> zeroinitializer, %local
22 %phi2 = sub <1 x i32> zeroinitializer, %sum
|
| /external/llvm/test/CodeGen/X86/ |
| vec_zero-2.ll | 11 %tmp5256 = bitcast <2 x i64> zeroinitializer to <8 x i16> ; <<8 x i16>> [#uses=1]
12 %tmp5257 = sub <8 x i16> %tmp5256, zeroinitializer ; <<8 x i16>> [#uses=1]
15 %tmp5266 = call <16 x i8> @llvm.x86.sse2.packuswb.128( <8 x i16> %tmp5265, <8 x i16> zeroinitializer ) nounwind readnone ; <<8 x i16>> [#uses=1]
17 %tmp5294 = and <2 x i64> zeroinitializer, %tmp5267 ; <<2 x i64>> [#uses=1]
20 %tmp5294.pn = phi <2 x i64> [ %tmp5294, %bb4743 ], [ zeroinitializer, %bb1664 ] ; <<2 x i64>> [#uses=0]
|
| viabs.ll | 25 %tmp1neg = sub <4 x i32> zeroinitializer, %a
50 %tmp1neg = sub <4 x i32> zeroinitializer, %a
51 %b = icmp sge <4 x i32> %a, zeroinitializer
75 %tmp1neg = sub <8 x i16> zeroinitializer, %a
76 %b = icmp sgt <8 x i16> %a, zeroinitializer
100 %tmp1neg = sub <16 x i8> zeroinitializer, %a
101 %b = icmp slt <16 x i8> %a, zeroinitializer
125 %tmp1neg = sub <4 x i32> zeroinitializer, %a
126 %b = icmp sle <4 x i32> %a, zeroinitializer
144 %tmp1neg = sub <8 x i32> zeroinitializer, %
[all...] |
| 2011-04-19-sclr-bb.ll | 12 %vec1 = phi <4 x i1> [ %vec1_or_2, %LOOP ], [ zeroinitializer, %ENTRY ]
13 %vec2 = phi <4 x i1> [ %vec2_and_1, %LOOP ], [ zeroinitializer, %ENTRY ]
|
| 2012-07-17-vtrunc.ll | 8 %Shuff13 = shufflevector <4 x i64> zeroinitializer, <4 x i64> undef, <4 x i32> zeroinitializer
|
| avx-select.ll | 8 %selres = select i1 %cmpres, <8 x i32> zeroinitializer, <8 x i32> %b
18 %selres = select i1 %cmpres, <4 x i64> zeroinitializer, <4 x i64> %b
|
| vec_unsafe-fp-math.ll | 11 %sub = fsub <4 x float> %x, zeroinitializer
21 %sub = fsub <4 x float> zeroinitializer, %x
|
| /external/llvm/test/CodeGen/Mips/msa/ |
| llvm-stress-s3861334421.ll | 20 %Shuff = shufflevector <8 x i64> zeroinitializer, <8 x i64> zeroinitializer, <8 x i32> <i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 undef, i32 1>
21 %I = insertelement <8 x i64> zeroinitializer, i64 %4, i32 5
28 %Shuff7 = shufflevector <4 x i64> zeroinitializer, <4 x i64> zeroinitializer, <4 x i32> <i32 2, i32 4, i32 6, i32 0>
30 %B9 = or <8 x i64> zeroinitializer, zeroinitializer
38 %E12 = extractelement <4 x i64> zeroinitializer, i32 0
39 %Shuff13 = shufflevector <8 x i64> zeroinitializer, <8 x i64> zeroinitializer, <8 x i32> <i32 7, i32 9, i32 11, i32 13, i32 undef, i32 1, i32 3, i32 5
[all...] |
| llvm-stress-s997348632.ll | 19 %E = extractelement <4 x i32> zeroinitializer, i32 0
20 %Shuff = shufflevector <4 x i64> zeroinitializer, <4 x i64> zeroinitializer, <4 x i32> <i32 undef, i32 1, i32 3, i32 5>
21 %I = insertelement <2 x i1> zeroinitializer, i1 false, i32 1
22 %FC = sitofp <4 x i32> zeroinitializer to <4 x double>
26 %E6 = extractelement <1 x i16> zeroinitializer, i32 0
28 %I8 = insertelement <1 x i16> zeroinitializer, i16 0, i32 0
32 %Cmp = icmp ult <4 x i64> zeroinitializer, zeroinitializer
35 %E12 = extractelement <4 x i64> zeroinitializer, i32
[all...] |
| llvm-stress-s2704903805.ll | 18 %E = extractelement <2 x i16> zeroinitializer, i32 0
21 %B = lshr <2 x i16> zeroinitializer, zeroinitializer
22 %FC = sitofp <4 x i16> zeroinitializer to <4 x float>
31 %Shuff7 = shufflevector <2 x i16> zeroinitializer, <2 x i16> zeroinitializer, <2 x i32> <i32 1, i32 3>
32 %I8 = insertelement <4 x i16> zeroinitializer, i16 %E, i32 3
33 %B9 = ashr <2 x i16> %Shuff7, zeroinitializer
42 %E14 = extractelement <2 x i64> zeroinitializer, i32 0
45 %B17 = lshr <2 x i16> zeroinitializer, %
[all...] |
| /external/llvm/test/CodeGen/SystemZ/ |
| vec-move-14.ll | 11 %ret = insertelement <16 x i8> zeroinitializer, i8 %val, i32 7
22 %ret = insertelement <16 x i8> zeroinitializer, i8 %val, i32 7
33 %ret = insertelement <16 x i8> zeroinitializer, i8 %val, i32 7
44 %ret = insertelement <16 x i8> zeroinitializer, i8 %val, i32 7
54 %ret = insertelement <8 x i16> zeroinitializer, i16 %val, i32 3
64 %ret = insertelement <4 x i32> zeroinitializer, i32 %val, i32 1
74 %ret = insertelement <2 x i64> zeroinitializer, i64 %val, i32 0
84 %ret = insertelement <4 x float> zeroinitializer, float %val, i32 1
94 %ret = insertelement <2 x double> zeroinitializer, double %val, i32 0
|
| /external/llvm/test/Transforms/ConstProp/ |
| constant-expr.ll | 67 @T6 = global <2 x i1> fcmp ole (<2 x float> fdiv (<2 x float> undef, <2 x float> <float 1.000000e+00, float 1.000000e+00>), <2 x float> zeroinitializer)
72 @pr9011_1 = constant <4 x i32> zext (<4 x i8> zeroinitializer to <4 x i32>)
73 ; CHECK: pr9011_1 = constant <4 x i32> zeroinitializer
74 @pr9011_2 = constant <4 x i32> sext (<4 x i8> zeroinitializer to <4 x i32>)
75 ; CHECK: pr9011_2 = constant <4 x i32> zeroinitializer
76 @pr9011_3 = constant <4 x i32> bitcast (<16 x i8> zeroinitializer to <4 x i32>)
77 ; CHECK: pr9011_3 = constant <4 x i32> zeroinitializer
78 @pr9011_4 = constant <4 x float> uitofp (<4 x i8> zeroinitializer to <4 x float>)
79 ; CHECK: pr9011_4 = constant <4 x float> zeroinitializer
80 @pr9011_5 = constant <4 x float> sitofp (<4 x i8> zeroinitializer to <4 x float>
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| neon_vabs.ll | 6 %tmp1neg = sub <4 x i32> zeroinitializer, %a
15 %tmp1neg = sub <4 x i32> zeroinitializer, %a
16 %b = icmp sge <4 x i32> %a, zeroinitializer
24 %tmp1neg = sub <8 x i16> zeroinitializer, %a
25 %b = icmp sgt <8 x i16> %a, zeroinitializer
33 %tmp1neg = sub <16 x i8> zeroinitializer, %a
34 %b = icmp slt <16 x i8> %a, zeroinitializer
42 %tmp1neg = sub <4 x i32> zeroinitializer, %a
43 %b = icmp sle <4 x i32> %a, zeroinitializer
51 %tmp1neg = sub <2 x i32> zeroinitializer, %
[all...] |
| 2009-10-02-NEONSubregsBug.ll | 15 %6 = fsub <4 x float> zeroinitializer, %3 ; <<4 x float>> [#uses=1]
16 %7 = shufflevector <4 x float> %6, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=2]
20 %11 = shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
22 %13 = shufflevector <2 x float> %12, <2 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
26 %17 = fadd <4 x float> %15, zeroinitializer ; <<4 x float>> [#uses=1]
27 %18 = shufflevector <4 x float> %17, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 undef, i32 undef> ; <<4 x float>> [#uses=1]
29 %20 = fadd <4 x float> %19, zeroinitializer ; <<4 x float>> [#uses=1]
31 %22 = shufflevector <4 x float> %21, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1]
38 %29 = tail call <4 x float> @llvm.arm.neon.vrecpe.v4f32(<4 x float> zeroinitializer) nounwind ; <<4 x float>> [#uses=1
[all...] |
| 2010-04-14-SplitVector.ll | 9 %tmp63 = bitcast <4 x float> zeroinitializer to i128
|
| 2012-01-26-CoalescerBug.ll | 12 %4 = shufflevector <2 x i64> %3, <2 x i64> undef, <1 x i32> zeroinitializer
13 %5 = xor <2 x i32> zeroinitializer, <i32 -1, i32 -1>
14 %6 = bitcast <2 x i32> zeroinitializer to <2 x float>
15 %7 = shufflevector <2 x float> zeroinitializer, <2 x float> %6, <2 x i32> <i32 0, i32 2>
|
| /external/clang/test/CodeGen/ |
| ms-align-tentative.c | 20 // CHECK-DAG: @s = global %struct.S zeroinitializer, align 64
25 // CHECK-DAG: @w = global %struct.Wrap zeroinitializer, align 64
|
| /external/clang/test/CodeGenOpenCL/ |
| logical-ops.cl | 14 // CHECK: store <4 x i32> zeroinitializer
19 // CHECK: store <4 x i32> zeroinitializer
24 // CHECK: store <4 x i32> zeroinitializer
30 // CHECK: store <4 x float> zeroinitializer
38 // CHECK: store <4 x i64> zeroinitializer
43 // CHECK: store <4 x i64> zeroinitializer
48 // CHECK: store <4 x i64> zeroinitializer
54 // CHECK: store <4 x double> zeroinitializer
|
| /external/llvm/test/CodeGen/PowerPC/ |
| illegal-element-type.ll | 20 %V.0 = phi <8 x i16> [ %tmp42, %bb45 ], [ zeroinitializer, %bb30 ] ; <<8 x i16>> [#uses=1]
21 %tmp42 = mul <8 x i16> zeroinitializer, %V.0 ; <<8 x i16>> [#uses=1]
|
| sub-bv-types.ll | 6 %Shuff7 = shufflevector <16 x i16> zeroinitializer, <16 x i16> zeroinitializer, <16 x i32> <i32 undef, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 undef, i32 22, i32 undef, i32 26, i32 undef, i32 30>
|
| sdag-ppcf128.ll | 10 store { ppc_fp128, ppc_fp128 } zeroinitializer, { ppc_fp128, ppc_fp128 }* undef
|
| /external/llvm/test/CodeGen/Thumb2/ |
| 2013-03-06-vector-sext-operand-scalarize.ll | 8 %vec = insertelement <1 x i1> zeroinitializer, i1 %Cmp, i32 0
16 %vec = insertelement <1 x i1> zeroinitializer, i1 %Cmp, i32 0
|
| /external/llvm/test/Transforms/GlobalOpt/ |
| 2008-01-13-OutOfRangeSROA.ll | 1 ; RUN: opt < %s -globalopt -S | grep "16 x .31 x double.. zeroinitializer"
4 @mm = internal global [16 x [31 x double]] zeroinitializer, align 32
|
| /external/llvm/test/Transforms/LICM/ |
| 2011-07-06-Alignment.ll | 3 @A = common global [1024 x float] zeroinitializer, align 4
13 store <4 x float> zeroinitializer, <4 x float>* %vecidx, align 4
|
