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      1 ; RUN: llc -march=mips < %s
      2 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s
      3 ; RUN: llc -march=mipsel < %s
      4 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s
      5 
      6 ; This test originally failed for MSA with a
      7 ; "Don't know how to expand this condition!" unreachable.
      8 ; It should at least successfully build.
      9 
     10 define void @autogen_SD3861334421(i8*, i32*, i64*, i32, i64, i8) {
     11 BB:
     12   %A4 = alloca <2 x i32>
     13   %A3 = alloca <2 x double>
     14   %A2 = alloca i64
     15   %A1 = alloca i64
     16   %A = alloca double
     17   %L = load i8, i8* %0
     18   store i8 -101, i8* %0
     19   %E = extractelement <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, i32 0
     20   %Shuff = shufflevector <8 x i64> zeroinitializer, <8 x i64> zeroinitializer, <8 x i32> <i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 undef, i32 1>
     21   %I = insertelement <8 x i64> zeroinitializer, i64 %4, i32 5
     22   %B = and i64 116376, 57247
     23   %FC = uitofp i8 7 to double
     24   %Sl = select i1 false, <8 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>, <8 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
     25   %L5 = load i8, i8* %0
     26   store i8 %L, i8* %0
     27   %E6 = extractelement <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, i32 3
     28   %Shuff7 = shufflevector <4 x i64> zeroinitializer, <4 x i64> zeroinitializer, <4 x i32> <i32 2, i32 4, i32 6, i32 0>
     29   %I8 = insertelement <8 x i8> %Sl, i8 7, i32 4
     30   %B9 = or <8 x i64> zeroinitializer, zeroinitializer
     31   %Sl10 = select i1 false, i64 116376, i64 380809
     32   %Cmp = icmp sgt i32 394647, 17081
     33   br label %CF
     34 
     35 CF:                                               ; preds = %CF, %BB
     36   %L11 = load i8, i8* %0
     37   store i8 -87, i8* %0
     38   %E12 = extractelement <4 x i64> zeroinitializer, i32 0
     39   %Shuff13 = shufflevector <8 x i64> zeroinitializer, <8 x i64> zeroinitializer, <8 x i32> <i32 7, i32 9, i32 11, i32 13, i32 undef, i32 1, i32 3, i32 5>
     40   %I14 = insertelement <4 x i64> zeroinitializer, i64 380809, i32 1
     41   %B15 = srem i64 %Sl10, 380809
     42   %FC16 = sitofp i64 57247 to float
     43   %Sl17 = select i1 false, double 0x87A9374869A78EC6, double 0.000000e+00
     44   %Cmp18 = icmp uge i8 %L, %5
     45   br i1 %Cmp18, label %CF, label %CF80
     46 
     47 CF80:                                             ; preds = %CF80, %CF88, %CF
     48   %L19 = load i8, i8* %0
     49   store i8 -101, i8* %0
     50   %E20 = extractelement <4 x i64> zeroinitializer, i32 0
     51   %Shuff21 = shufflevector <4 x i64> zeroinitializer, <4 x i64> %Shuff7, <4 x i32> <i32 7, i32 1, i32 3, i32 5>
     52   %I22 = insertelement <4 x i64> zeroinitializer, i64 127438, i32 1
     53   %B23 = fdiv double %Sl17, 0.000000e+00
     54   %Sl24 = select i1 %Cmp18, i32 420510, i32 492085
     55   %Cmp25 = icmp ugt i1 %Cmp18, false
     56   br i1 %Cmp25, label %CF80, label %CF83
     57 
     58 CF83:                                             ; preds = %CF83, %CF80
     59   %L26 = load i8, i8* %0
     60   store i8 -87, i8* %0
     61   %E27 = extractelement <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, i32 0
     62   %Shuff28 = shufflevector <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> <i32 7, i32 1, i32 3, i32 5>
     63   %I29 = insertelement <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, i32 492085, i32 1
     64   %B30 = lshr <8 x i8> %I8, %I8
     65   %FC31 = sitofp <4 x i32> %Shuff28 to <4 x double>
     66   %Sl32 = select i1 false, <8 x i8> %I8, <8 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
     67   %Cmp33 = icmp eq i64 %B, 116376
     68   br i1 %Cmp33, label %CF83, label %CF88
     69 
     70 CF88:                                             ; preds = %CF83
     71   %L34 = load i8, i8* %0
     72   store i8 -87, i8* %0
     73   %E35 = extractelement <8 x i64> %Shuff, i32 7
     74   %Shuff36 = shufflevector <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> %Shuff28, <4 x i32> <i32 2, i32 undef, i32 undef, i32 0>
     75   %I37 = insertelement <4 x i64> zeroinitializer, i64 380809, i32 0
     76   %B38 = xor <8 x i64> %B9, %B9
     77   %ZE = zext i32 0 to i64
     78   %Sl39 = select i1 %Cmp33, i8 %L11, i8 %L5
     79   %Cmp40 = icmp sgt i1 %Cmp, false
     80   br i1 %Cmp40, label %CF80, label %CF81
     81 
     82 CF81:                                             ; preds = %CF81, %CF85, %CF87, %CF88
     83   %L41 = load i8, i8* %0
     84   store i8 %L34, i8* %0
     85   %E42 = extractelement <8 x i64> %Shuff13, i32 6
     86   %Shuff43 = shufflevector <4 x i64> zeroinitializer, <4 x i64> zeroinitializer, <4 x i32> <i32 undef, i32 undef, i32 undef, i32 7>
     87   %I44 = insertelement <4 x i64> zeroinitializer, i64 116376, i32 3
     88   %B45 = fsub float %FC16, 0x3AC86DCC40000000
     89   %Tr = trunc <4 x i64> %I14 to <4 x i32>
     90   %Sl46 = select i1 false, <8 x i64> %B38, <8 x i64> zeroinitializer
     91   %Cmp47 = icmp sgt i1 %Cmp18, %Cmp18
     92   br i1 %Cmp47, label %CF81, label %CF85
     93 
     94 CF85:                                             ; preds = %CF81
     95   %L48 = load i8, i8* %0
     96   store i8 -101, i8* %0
     97   %E49 = extractelement <8 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>, i32 2
     98   %Shuff50 = shufflevector <4 x i64> zeroinitializer, <4 x i64> zeroinitializer, <4 x i32> <i32 5, i32 7, i32 1, i32 3>
     99   %I51 = insertelement <4 x i64> zeroinitializer, i64 %E20, i32 3
    100   %B52 = or i32 336955, %Sl24
    101   %FC53 = uitofp i8 %L48 to double
    102   %Sl54 = select i1 %Cmp47, i32 %3, i32 %Sl24
    103   %Cmp55 = icmp ne <8 x i64> %Shuff13, zeroinitializer
    104   %L56 = load i8, i8* %0
    105   store i8 %L11, i8* %0
    106   %E57 = extractelement <4 x i64> %Shuff21, i32 1
    107   %Shuff58 = shufflevector <8 x i64> %Shuff, <8 x i64> zeroinitializer, <8 x i32> <i32 4, i32 6, i32 undef, i32 10, i32 12, i32 undef, i32 0, i32 2>
    108   %I59 = insertelement <4 x i64> zeroinitializer, i64 %E42, i32 2
    109   %B60 = udiv <8 x i8> %Sl, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
    110   %Tr61 = trunc i8 49 to i1
    111   br i1 %Tr61, label %CF81, label %CF84
    112 
    113 CF84:                                             ; preds = %CF84, %CF85
    114   %Sl62 = select i1 false, i8 %L, i8 %L48
    115   %Cmp63 = icmp ne <8 x i64> %I, zeroinitializer
    116   %L64 = load i8, i8* %0
    117   store i8 %5, i8* %0
    118   %E65 = extractelement <8 x i1> %Cmp55, i32 0
    119   br i1 %E65, label %CF84, label %CF87
    120 
    121 CF87:                                             ; preds = %CF84
    122   %Shuff66 = shufflevector <4 x i64> %Shuff21, <4 x i64> %I14, <4 x i32> <i32 3, i32 undef, i32 7, i32 1>
    123   %I67 = insertelement <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, i32 %Sl54, i32 1
    124   %B68 = frem double %B23, %Sl17
    125   %ZE69 = zext <8 x i8> %Sl32 to <8 x i64>
    126   %Sl70 = select i1 %Tr61, i64 %E20, i64 %E12
    127   %Cmp71 = icmp slt <8 x i64> %I, %Shuff
    128   %L72 = load i8, i8* %0
    129   store i8 %L72, i8* %0
    130   %E73 = extractelement <8 x i1> %Cmp55, i32 6
    131   br i1 %E73, label %CF81, label %CF82
    132 
    133 CF82:                                             ; preds = %CF82, %CF87
    134   %Shuff74 = shufflevector <4 x i32> %I67, <4 x i32> %I29, <4 x i32> <i32 1, i32 3, i32 undef, i32 7>
    135   %I75 = insertelement <4 x i64> zeroinitializer, i64 380809, i32 3
    136   %B76 = fsub double 0.000000e+00, %FC53
    137   %Tr77 = trunc i32 %E to i8
    138   %Sl78 = select i1 %Cmp18, i64* %A2, i64* %2
    139   %Cmp79 = icmp eq i32 394647, 492085
    140   br i1 %Cmp79, label %CF82, label %CF86
    141 
    142 CF86:                                             ; preds = %CF82
    143   store i64 %Sl70, i64* %Sl78
    144   store i64 %E57, i64* %Sl78
    145   store i64 %Sl70, i64* %Sl78
    146   store i64 %B, i64* %Sl78
    147   store i64 %Sl10, i64* %Sl78
    148   ret void
    149 }
    150