| /prebuilts/go/linux-x86/src/cmd/internal/rsc.io/arm/armasm/ |
| objdump_test.go | 87 // word 510F4000. we say apsr, libopcodes says CPSR.
88 if strings.Replace(dec.text, "CPSR", "apsr", -1) == text {
|
| /external/llvm/lib/Target/ARM/ |
| ARMInstrThumb.td | 365 // tADDrSPi, but we may need to insert a sequence that clobbers CPSR.
369 let Defs = [CPSR];
872 let isCommutable = 1, Uses = [CPSR] in
[all...] |
| ARMInstrInfo.td | 85 // SDTBinaryArithWithFlagsInOut - RES1, CPSR = op LHS, RHS, CPSR
[all...] |
| ARMFastISel.cpp | 214 bool DefinesOptionalPredicate(MachineInstr *MI, bool *CPSR);
227 // default CCReg argument. Sets CPSR if we're setting CPSR instead of CCR.
228 bool ARMFastISel::DefinesOptionalPredicate(MachineInstr *MI, bool *CPSR) {
232 // Look to see if our OptionalDef is defining CPSR or CCR.
236 if (MO.getReg() == ARM::CPSR)
237 *CPSR = true;
260 // CPSR defs that need to be added before the remaining operands. See s_cc_out
273 // defines CPSR. All other OptionalDefines in ARM are the CCR register.
274 bool CPSR = false
[all...] |
| ARMInstrThumb2.td | 576 /// changed to modify CPSR.
702 /// instruction modifies the CPSR register.
705 /// AdjustInstrPostInstrSelection after giving then an optional CPSR operand.
706 let hasPostISelHook = 1, Defs = [CPSR] in {
714 [(set rGPR:$Rd, CPSR, (opnode GPRnopc:$Rn,
720 [(set rGPR:$Rd, CPSR, (opnode GPRnopc:$Rn,
729 [(set rGPR:$Rd, CPSR, (opnode GPRnopc:$Rn,
737 let hasPostISelHook = 1, Defs = [CPSR] in {
743 [(set rGPR:$Rd, CPSR, (opnode t2_so_imm:$imm,
750 [(set rGPR:$Rd, CPSR, (opnode t2_so_reg:$ShiftedRm
[all...] |
| ARM.td | 119 /// Some instructions update CPSR partially, which can add false dependency for
121 /// mapped to a separate physical register. Avoid partial CPSR update for these
123 def FeatureAvoidPartialCPSR : SubtargetFeature<"avoid-partial-cpsr",
125 "Avoid CPSR partial update for OOO execution">;
[all...] |
| ARMFeatures.h | 52 // Outside of an IT block, these set CPSR.
|
| Thumb1InstrInfo.cpp | 59 // * 'movs $dst, $src' if cpsr isn't live
|
| /external/v8/src/arm/ |
| constants-arm.h | 234 CPSR = 0 << 22,
257 CPSR_c = CPSR | 1 << 16,
258 CPSR_x = CPSR | 1 << 17,
259 CPSR_s = CPSR | 1 << 18,
260 CPSR_f = CPSR | 1 << 19,
|
| /external/libunwind_llvm/src/ |
| UnwindRegistersSave.S | 262 // skip cpsr
320 @ T1 does not have a non-cpsr-clobbering register-zeroing instruction.
321 @ It is safe to use here though because we are about to return, and cpsr is
|
| /ndk/sources/cxx-stl/llvm-libc++abi/libcxxabi/src/Unwind/ |
| UnwindRegistersSave.S | 262 ; skip cpsr
320 @ T1 does not have a non-cpsr-clobbering register-zeroing instruction.
321 @ It is safe to use here though because we are about to return, and cpsr is
|
| /external/google-breakpad/src/client/linux/dump_writer_common/ |
| ucontext_reader.cc | 177 out->cpsr = uc->uc_mcontext.arm_cpsr;
199 out->cpsr = static_cast<uint32_t>(uc->uc_mcontext.pstate);
|
| /external/llvm/test/CodeGen/MIR/ARM/ |
| ARMLoadStoreDBG.mir | 133 t2CMPri %r3, 4, 14, _, implicit-def %cpsr, debug-location !31
134 t2Bcc %bb.2.if.end, 2, killed %cpsr
|
| /external/valgrind/VEX/priv/ |
| guest_arm_defs.h | 83 they appear in the CPSR, viz bits 31:28 for N Z V C respectively.
119 /* Flags masks. Defines positions of flags bits in the CPSR. */
|
| /external/valgrind/coregrind/m_gdbserver/ |
| valgrind-low-arm64.c | 73 { "cpsr", 2112, 32 },
185 case 33: *mod = False; break; // GDBTD cpsr what to do for arm64 ???
|
| /external/google-breakpad/src/processor/ |
| dump_context.cc | 517 printf(" cpsr = 0x%x\n", context_arm->cpsr);
547 printf(" cpsr = 0x%x\n", context_arm64->cpsr);
|
| /external/kernel-headers/original/uapi/asm-arm/asm/ |
| kvm.h | 58 struct pt_regs usr_regs; /* R0_usr - R14_usr, PC, CPSR */
|
| /prebuilts/go/darwin-x86/src/runtime/ |
| defs_darwin_arm.go | 214 cpsr uint32
|
| defs_darwin_arm64.go | 216 cpsr uint32 // current program status register
|
| /prebuilts/go/linux-x86/src/runtime/ |
| defs_darwin_arm.go | 214 cpsr uint32
|
| defs_darwin_arm64.go | 216 cpsr uint32 // current program status register
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| arch7.d | 50 0+0a0 <[^>]*> f3ef 8000 mrs r0, (CPSR|APSR)
|
| thumb2_bad_reg.s | 225 mrs r13, cpsr
226 mrs r15, cpsr
228 msr cpsr, r13
229 msr cpsr, r15
|
| /external/valgrind/none/tests/arm/ |
| v6media.c | 21 unsigned int cpsr; \
32 "mrs %1,cpsr;" \
33 : "=&r" (out), "=&r" (cpsr) \
37 printf("%s :: rd 0x%08x rm 0x%08x, carryin %d, cpsr 0x%08x %c%c%c%c%c ge[3:0]=%d%d%d%d\n", \
40 cpsr & 0xffff0000, \
41 ((1<<31) & cpsr) ? 'N' : ' ', \
42 ((1<<30) & cpsr) ? 'Z' : ' ', \
43 ((1<<29) & cpsr) ? 'C' : ' ', \
44 ((1<<28) & cpsr) ? 'V' : ' ', \
45 ((1<<27) & cpsr) ? 'Q' : ' ',
[all...] |
| /external/libopus/celt/arm/ |
| arm2gnu.pl | 167 s/CPSR/cpsr/;
|
