/prebuilts/go/linux-x86/src/cmd/internal/obj/ppc64/ |
anames.go | 98 "FMUL",
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/epiphany/ |
allinsn.s | 1492 fmul ip,ip,ip 1493 fmul r3,r3,r3 1494 fmul r0,r0,r0 1495 fmul fp,fp,fp 1496 fmul sp,sp,sp 1497 fmul r3,ip,fp 1498 fmul lr,r1,r2 1499 fmul sp,lr,lr 1503 fmul ip,ip,ip 1504 fmul r59,r59,r5 [all...] |
sample.s | 112 test3 fmul
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/external/llvm/test/Bitcode/ |
binaryFloatInstructions.3.2.ll | 99 define void @fmul(float %x1){ 101 ; CHECK: %res1 = fmul float %x1, %x1 102 %res1 = fmul float %x1, %x1
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/external/llvm/test/CodeGen/AMDGPU/ |
fneg-fabs.f64.ll | 32 %fmul = fmul double %y, %fsub 33 store double %fmul, double addrspace(1)* %out, align 8
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fneg-fabs.ll | 23 %fmul = fmul float %y, %fsub 24 store float %fmul, float addrspace(1)* %out, align 4
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llvm.sin.ll | 34 %y = fmul float 3.0, %x 50 %y = fmul float 2.0, %x 65 %y = fmul float 2.0, %x
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subreg-coalescer-crash.ll | 66 %tmp8 = fmul float undef, undef 81 %tmp17 = fmul float 10.5, %tmp16 82 %tmp18 = fmul float 11.5, %tmp15
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mad-combine.ll | 16 ; (fadd (fmul x, y), z) -> (fma x, y, z) 45 %mul = fmul float %a, %b 51 ; (fadd (fmul x, y), z) -> (fma x, y, z) 87 %mul = fmul float %a, %b 96 ; (fadd x, (fmul y, z)) -> (fma y, z, x) 121 %mul = fmul float %a, %b 127 ; (fsub (fmul x, y), z) -> (fma x, y, (fneg z)) 151 %mul = fmul float %a, %b 157 ; (fsub (fmul x, y), z) -> (fma x, y, (fneg z)) 191 %mul = fmul float %a, % [all...] |
mad-sub.ll | 24 %mul = fmul float %a, %b 48 %mul = fmul float %a, %b 69 %mul = fmul double %a, %b 94 %mul = fmul float %a, %b 119 %mul = fmul float %a, %b 141 %mul = fmul float %nega, %negb 166 %mul = fmul float %a, %b.abs
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/external/llvm/test/CodeGen/X86/ |
2008-02-27-DeadSlotElimBug.ll | 27 %tmp17.i76 = fmul double %tmp4344, 0.000000e+00 ; <double> [#uses=1] 32 %tmp17.i63 = fmul double %tmp5051, 0.000000e+00 ; <double> [#uses=1] 38 %tmp17.i = fmul double %tmp5657, %tmp16.i50 ; <double> [#uses=1]
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2012-04-26-sdglue.ll | 30 %tmp26 = fmul <8 x float> %tmp17, undef 31 %tmp27 = fmul <8 x float> %tmp25, undef 35 %tmp31 = fmul <4 x float> undef, %tmp30
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multiple-loop-post-inc.ll | 42 %12 = fmul float %11, %x.0 ; <float> [#uses=1] 64 %19 = fmul float %0, 4.000000e+00 ; <float> [#uses=1] 66 %20 = fmul float %0, 1.600000e+01 ; <float> [#uses=1] 68 %21 = fmul float %0, 0.000000e+00 ; <float> [#uses=1] 71 %24 = fmul float %0, 2.000000e+00 ; <float> [#uses=1] 73 %26 = fmul float %0, 3.000000e+00 ; <float> [#uses=1] 134 %40 = fmul <4 x float> %36, %vX0.039 ; <<4 x float>> [#uses=1] 136 %42 = fmul <4 x float> %37, %vX1.036 ; <<4 x float>> [#uses=1] 137 %43 = fmul <4 x float> %38, %vX2.037 ; <<4 x float>> [#uses=1] 138 %44 = fmul <4 x float> %39, %vX3.041 ; <<4 x float>> [#uses=1 [all...] |
2007-04-24-VectorCrash.ll | 32 fmul <4 x float> %22, zeroinitializer ; <<4 x float>>:23 [#uses=1] 38 fmul <4 x float> zeroinitializer, %28 ; <<4 x float>>:29 [#uses=1] 40 fmul <4 x float> zeroinitializer, %30 ; <<4 x float>>:31 [#uses=1] 42 fmul <4 x float> zeroinitializer, %32 ; <<4 x float>>:33 [#uses=1] 44 fmul <4 x float> zeroinitializer, %34 ; <<4 x float>>:35 [#uses=1]
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fold-pcmpeqd-2.ll | 41 %mul166.i = fmul <4 x float> zeroinitializer, %sub140.i ; <<4 x float>> [#uses=1] 43 %mul171.i = fmul <4 x float> %add167.i, %sub140.i ; <<4 x float>> [#uses=1] 48 %mul186.i = fmul <4 x float> %bitcast179.i, zeroinitializer ; <<4 x float>> [#uses=1] 54 %mul310 = fmul <4 x float> %bitcast204.i104, zeroinitializer ; <<4 x float>> [#uses=2] 55 %mul313 = fmul <4 x float> %bitcast204.i, zeroinitializer ; <<4 x float>> [#uses=1]
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/external/llvm/test/Transforms/FunctionAttrs/ |
optnone-simple.ll | 105 %mul = fmul <4 x float> %0, %1 123 %mul = fmul <4 x float> %0, %1 134 ; CHECK: fmul <4 x float>
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/external/llvm/test/Transforms/Reassociate/ |
fast-ArrayOutOfBounds.ll | 21 ; CHECK-NEXT: %T = fmul float %tmp.34, %tmp.34 39 %T = fmul float %tmp.34, %tmp.34 63 %T = fmul fast float %tmp.34, %tmp.34
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/external/llvm/test/Transforms/IndVarSimplify/ |
ashr-tripcount.ll | 36 %invQuantizer.0 = fmul float %.pn, %.pn1 ; <float> [#uses=4] 75 %t33 = fmul float %t11, %invQuantizer.0 ; <float> [#uses=1] 80 %t37 = fmul float %t18, %invQuantizer.0 ; <float> [#uses=1] 85 %t41 = fmul float %t25, %invQuantizer.0 ; <float> [#uses=1] 90 %t45 = fmul float %t32, %invQuantizer.0 ; <float> [#uses=1]
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/external/llvm/test/Transforms/LoopReroll/ |
nonconst_lb.ll | 95 %mul = fmul float %1, %da 103 %mul7 = fmul float %3, %da 111 %mul15 = fmul float %5, %da 119 %mul23 = fmul float %7, %da 147 ; CHECK: %mul = fmul float %8, %da
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/toolchain/binutils/binutils-2.25/opcodes/ |
m88k-dis.c | 191 {0x84000000,"fmul.sss ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {6,1,PFLT,FMUL ,0,1,1,1,0,0,0,1,0,0,0,0} }, 192 {0x84000080,"fmul.ssd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {9,2,PFLT,FMUL ,0,1,1,1,0,0,0,1,0,0,1,0} }, 193 {0x84000200,"fmul.sds ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {9,2,PFLT,FMUL ,0,1,1,1,0,0,0,1,0,1,0,0} }, 194 {0x84000280,"fmul.sdd ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {9,2,PFLT,FMUL ,0,1,1,1,0,0,0,1,0,1,1,0} }, 195 {0x84000020,"fmul.dss ",{21,5,REG} ,{16,5,REG} ,{0,5,REG} , {9,2,PFLT,FMUL ,0,1,1,1,0,0,0,1,1,0,0,0} } [all...] |
/external/llvm/test/CodeGen/Mips/msa/ |
3rf.ll | 342 %2 = tail call <4 x float> @llvm.mips.fmul.w(<4 x float> %0, <4 x float> %1) 347 declare <4 x float> @llvm.mips.fmul.w(<4 x float>, <4 x float>) nounwind 352 ; CHECK: fmul.w 364 %2 = tail call <2 x double> @llvm.mips.fmul.d(<2 x double> %0, <2 x double> %1) 369 declare <2 x double> @llvm.mips.fmul.d(<2 x double>, <2 x double>) nounwind 374 ; CHECK: fmul.d 382 %2 = fmul <4 x float> %0, %1 390 ; CHECK: fmul.w 398 %2 = fmul <2 x double> %0, %1 406 ; CHECK: fmul. [all...] |
/external/llvm/test/CodeGen/NVPTX/ |
reg-copy.ll | 19 %mul.i = fmul float %0, %2 20 %mul4.i = fmul float %1, %3 21 %mul5.i = fmul float %0, %3 22 %mul6.i = fmul float %1, %2 196 %mul95.i = fmul float %__c.4.ph.i, %__a.4.ph.i 197 %mul96.i = fmul float %__d.4.ph.i, %__b.4.ph.i 199 %mul98.i = fmul float %sub97.i, 0x7FF0000000000000 201 %mul100.i = fmul float %__d.4.ph.i, %__a.4.ph.i 202 %mul101.i = fmul float %__c.4.ph.i, %__b.4.ph.i 204 %mul103.i = fmul float %add102.i, 0x7FF000000000000 [all...] |
/external/llvm/test/CodeGen/PowerPC/ |
2008-09-12-CoalescerBug.ll | 32 %13 = fmul float %10, 6.553500e+04 ; <float> [#uses=1] 34 %15 = fmul float %12, 6.553500e+04 ; <float> [#uses=1] 71 %40 = fmul float %37, 6.553500e+04 ; <float> [#uses=1] 73 %42 = fmul float %39, 6.553500e+04 ; <float> [#uses=1] 91 %53 = fmul float %50, 6.553500e+04 ; <float> [#uses=1] 93 %55 = fmul float %52, 6.553500e+04 ; <float> [#uses=1] 114 %76 = fmul float %73, 6.553500e+04 ; <float> [#uses=1] 116 %78 = fmul float %75, 6.553500e+04 ; <float> [#uses=1] 137 %89 = fmul float %86, 6.553500e+04 ; <float> [#uses=1] 139 %91 = fmul float %88, 6.553500e+04 ; <float> [#uses=1 [all...] |
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mn10300/ |
am33-2.c | 503 def_am_insn (fmul, fsfs, 3, 0xf970, 505 def_am_insn (fmul, fsfsfs, 4, 0xfb70, 507 def_am_insn (fmul, i32fsfs, 7, 0xfe70, 534 am_insn (fmul, fsfs), 535 am_insn (fmul, fsfsfs), 536 am_insn (fmul, i32fsfs), 589 def_am_insn (fmul, fdfd, 3, 0xf9f0, 591 def_am_insn (fmul, fdfdfd, 4, 0xfbf0, 613 am_insn (fmul, fdfd), 614 am_insn (fmul, fdfdfd) [all...] |
/external/llvm/test/CodeGen/AArch64/ |
arm64-neon-add-sub.ll | 130 ; CHECK: fmul d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}} 131 %1 = fmul <1 x double> %a, %b 144 ; CHECK: fmul d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}} 146 %1 = fmul <1 x double> %b, %c 153 ; CHECK: fmul d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}} 155 %1 = fmul <1 x double> %b, %c
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