1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 -mattr=+avx | FileCheck %s 2 ; rdar://11314175: SD Scheduler, BuildSchedUnits assert: 3 ; N->getNodeId() == -1 && "Node already inserted! 4 5 ; It's hard to test for the ISEL condition because CodeGen optimizes 6 ; away the bugpointed code. Just ensure the basics are still there. 7 ;CHECK-LABEL: func: 8 ;CHECK: vxorps 9 ;CHECK: vpshufd 10 ;CHECK: vpbroadcastd 11 ;CHECK: vinserti128 12 ;CHECK: vmulps 13 ;CHECK: vmulps 14 ;CHECK: ret 15 16 define void @func() nounwind ssp { 17 %tmp = load <4 x float>, <4 x float>* null, align 1 18 %tmp14 = getelementptr <4 x float>, <4 x float>* null, i32 2 19 %tmp15 = load <4 x float>, <4 x float>* %tmp14, align 1 20 %tmp16 = shufflevector <4 x float> %tmp, <4 x float> <float 0.000000e+00, float undef, float undef, float undef>, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4> 21 %tmp17 = call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float> %tmp16, <4 x float> undef, i8 1) 22 %tmp18 = bitcast <4 x float> %tmp to <16 x i8> 23 %tmp19 = shufflevector <16 x i8> %tmp18, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 24 %tmp20 = bitcast <16 x i8> %tmp19 to <4 x float> 25 %tmp21 = bitcast <4 x float> %tmp15 to <16 x i8> 26 %tmp22 = shufflevector <16 x i8> undef, <16 x i8> %tmp21, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19> 27 %tmp23 = bitcast <16 x i8> %tmp22 to <4 x float> 28 %tmp24 = shufflevector <4 x float> %tmp20, <4 x float> <float 0.000000e+00, float undef, float undef, float undef>, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4> 29 %tmp25 = call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float> %tmp24, <4 x float> %tmp23, i8 1) 30 %tmp26 = fmul <8 x float> %tmp17, undef 31 %tmp27 = fmul <8 x float> %tmp25, undef 32 %tmp28 = fadd <8 x float> %tmp26, %tmp27 33 %tmp29 = fadd <8 x float> %tmp28, undef 34 %tmp30 = shufflevector <8 x float> %tmp29, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 35 %tmp31 = fmul <4 x float> undef, %tmp30 36 %tmp32 = call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float> zeroinitializer, <4 x float> %tmp31, i8 1) 37 %tmp33 = fadd <8 x float> undef, %tmp32 38 %tmp34 = call <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float> %tmp33, <8 x float> undef) nounwind 39 %tmp35 = fsub <8 x float> %tmp34, undef 40 %tmp36 = call <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float> zeroinitializer, <8 x float> %tmp35) nounwind 41 store <8 x float> %tmp36, <8 x float>* undef, align 32 42 ret void 43 } 44 45 declare <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float>, <4 x float>, i8) nounwind readnone 46 47 declare <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float>, <8 x float>) nounwind readnone 48
