| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ppc/ |
| 476.s | 181 frsqrte 14,15
182 frsqrte. 14,15
|
| power7.d | 105 17c: (fd c0 78 34|34 78 c0 fd) frsqrte f14,f15
106 180: (fd c0 78 35|35 78 c0 fd) frsqrte\. f14,f15
|
| a2.d | 243 35c: (fe 80 a8 35|35 a8 80 fe) frsqrte\. f20,f21
244 360: (fe 80 a8 34|34 a8 80 fe) frsqrte f20,f21
245 364: (fe 80 a8 35|35 a8 80 fe) frsqrte\. f20,f21
246 368: (fe 80 a8 34|34 a8 80 fe) frsqrte f20,f21
247 36c: (fe 81 a8 35|35 a8 81 fe) frsqrte\. f20,f21,1
248 370: (fe 81 a8 34|34 a8 81 fe) frsqrte f20,f21,1
|
| 476.d | 188 2c8: (fd c0 78 34|34 78 c0 fd) frsqrte f14,f15
189 2cc: (fd c0 78 35|35 78 c0 fd) frsqrte\. f14,f15
|
| /external/llvm/test/MC/AArch64/ |
| neon-simd-misc.s | 718 frsqrte v4.4h, v0.4h
719 frsqrte v6.8h, v8.8h
720 frsqrte v6.4s, v8.4s
721 frsqrte v6.2d, v8.2d
722 frsqrte v4.2s, v0.2s
724 // CHECK: frsqrte v4.4h, v0.4h // encoding: [0x04,0xd8,0xf9,0x2e]
725 // CHECK: frsqrte v6.8h, v8.8h // encoding: [0x06,0xd9,0xf9,0x6e]
726 // CHECK: frsqrte v6.4s, v8.4s // encoding: [0x06,0xd9,0xa1,0x6e]
727 // CHECK: frsqrte v6.2d, v8.2d // encoding: [0x06,0xd9,0xe1,0x6e]
728 // CHECK: frsqrte v4.2s, v0.2s // encoding: [0x04,0xd8,0xa1,0x2e
[all...] |
| arm64-advsimd.s | 584 frsqrte.2s v0, v0
634 ; CHECK: frsqrte.2s v0, v0 ; encoding: [0x00,0xd8,0xa1,0x2e]
681 frsqrte.4h v0, v0
694 ; CHECK: frsqrte.4h v0, v0 ; encoding: [0x00,0xd8,0xf9,0x2e]
707 frsqrte.8h v0, v0
720 ; CHECK: frsqrte.8h v0, v0 ; encoding: [0x00,0xd8,0xf9,0x6e]
[all...] |
| /external/valgrind/docs/internals/ |
| 3_1_BUGSTATUS.txt | 142 many wontfix 120277 ppc32: fres, fctid, fctidz, frsqrte
|
| /external/llvm/lib/Target/PowerPC/ |
| PPC.td | 73 def FeatureFRSQRTE : SubtargetFeature<"frsqrte", "HasFRSQRTE", "true",
74 "Enable the frsqrte instruction">;
|
| PPCTargetMachine.cpp | 191 // number of digits correct after every iteration. For both FRE and FRSQRTE,
|
| PPCISelLowering.h | 54 FRE, FRSQRTE,
[all...] |
| /external/valgrind/coregrind/ |
| m_machine.c | [all...] |
| /prebuilts/gcc/darwin-x86/host/i686-apple-darwin-4.2.1/include/gcc/darwin/4.2/ |
| ppc_intrinsics.h | 766 __asm__ ("frsqrte %0,%1"
780 __asm__ ("frsqrte %0, %1"
|
| /frameworks/rs/driver/runtime/arch/ |
| asimd.ll | 37 declare <2 x float> @llvm.aarch64.neon.frsqrte.v2f32(<2 x float>) nounwind readnone
38 declare <4 x float> @llvm.aarch64.neon.frsqrte.v4f32(<4 x float>) nounwind readnone
[all...] |
| /external/valgrind/VEX/pub/ |
| libvex.h | 108 (fres,frsqrte,fsel,stfiwx) */
117 (fres,frsqrte,fsel,stfiwx) */
[all...] |
| /toolchain/binutils/binutils-2.25/opcodes/ |
| ChangeLog-2006 | 147 "frsqrtes", "frsqrtes." "fre", "fre.", "frsqrte" and "frsqrte.".
|
| /external/valgrind/VEX/switchback/ |
| test_ppc_jm1.c | [all...] |
| /external/valgrind/none/tests/ppc32/ |
| jm-insns.c | [all...] |
| /external/clang/test/CodeGen/ |
| aarch64-neon-misc.c | [all...] |
| /external/vixl/test/ |
| test-simulator-traces-a64.h | 538 #include "traces/a64/sim-frsqrte-2d-trace-a64.h"
539 #include "traces/a64/sim-frsqrte-2s-trace-a64.h"
540 #include "traces/a64/sim-frsqrte-4s-trace-a64.h"
541 #include "traces/a64/sim-frsqrte-d-trace-a64.h"
542 #include "traces/a64/sim-frsqrte-s-trace-a64.h"
[all...] |
| test-disasm-a64.cc | [all...] |
| /external/valgrind/none/tests/arm64/ |
| fp_and_simd.c | [all...] |
| /external/llvm/test/MC/Disassembler/AArch64/ |
| arm64-advsimd.txt | 482 # CHECK: frsqrte.2s v0, v0
[all...] |
| /external/vixl/doc/ |
| supported-instructions.md | [all...] |
| /external/vixl/src/vixl/a64/ |
| disasm-a64.cc | [all...] |
| macro-assembler-a64.h | [all...] |
