/external/vixl/src/vixl/a64/ |
macro-assembler-a64.cc | 364 // The worst case for size is mov 64-bit immediate to sp: 376 // 4. 32-bit orr immediate. 377 // 5. 64-bit orr immediate. 384 // Try to move the immediate in one instruction, and if that fails, switch to 392 // Generic immediate case. Imm will be represented by 461 // Immediate can be represented in a move zero instruction. Movz can't write 468 // Immediate can be represented in a move negative instruction. Movn can't 475 // Immediate can be represented in a logical orr instruction. 708 // The worst case for size is logical immediate to sp: 716 int64_t immediate = operand.immediate() local [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ConditionOptimizer.cpp | 12 // branches and adjusts comparisons with immediate values by converting: 17 // and adjusting immediate values appropriately. It basically corrects two 18 // immediate values towards each other to make them equal. 94 // Stores immediate, compare instruction opcode and branch condition (in this 160 DEBUG(dbgs() << "Immediate of cmp is symbolic, " << *I << '\n'); 163 DEBUG(dbgs() << "Immediate of cmp may be out of range, " << *I << '\n'); 190 // Skip comparison instructions without immediate operands. 228 // CMN (compare with negative immediate) is an alias to ADDS (as 233 // Negate Correction value for comparison with negative immediate (CMN). 241 // Handle +0 -> -1 and -0 -> +1 (CMN with 0 immediate) transitions b [all...] |
/external/llvm/utils/TableGen/ |
X86RecognizableInstr.cpp | 586 // Operand 1 (optional) is an address or immediate. 587 // Operand 2 (optional) is an immediate. 591 HANDLE_OPTIONAL(immediate) 610 // Operand 3 (optional) is an immediate. 625 HANDLE_OPTIONAL(immediate) 631 // Operand 3 (optional) is an immediate. 647 HANDLE_OPTIONAL(immediate) 653 // Operand 3 (optional) is an immediate. 654 // Operand 4 (optional) is an immediate. 671 HANDLE_OPERAND(immediate) [all...] |
/frameworks/av/media/libeffects/testlibs/ |
AudioEqualizer.h | 174 // enabled again. Does not introduce artifacts, unless immediate is set. 175 // immediate Whether to apply change abruptly (ignored if filter is 177 void commit(bool immediate = false); 189 // introduce artifacts, unless immediate is set. 190 // immediate Whether to apply change abruptly. 191 void enable(bool immediate = false); 194 // immediate is set. 195 // immediate Whether to apply change abruptly. 196 void disable(bool immediate = false);
|
/external/llvm/lib/Target/Hexagon/ |
HexagonOperands.td | 1 //===- HexagonImmediates.td - Hexagon immediate processing -*- tablegen -*-===// 45 // Immediate operands. 120 // Immediate predicates 283 // u7StrictPosImmPred predicate - True if the immediate fits in an 7-bit 373 // n8ImmPred predicate - True if the immediate fits in a 8-bit signed 380 // nOneImmPred predicate - True if the immediate is -1. 388 // For use in setbit immediate. 398 // For use in clrbit immediate. 406 // True if the immediate is in range 0..31. 414 // For use in setbit immediate [all...] |
/external/llvm/test/MC/AArch64/ |
neon-scalar-shift-imm.s | 6 // Scalar Signed Shift Right (Immediate) 13 // Scalar Unsigned Shift Right (Immediate) 20 // Scalar Signed Rounding Shift Right (Immediate) 27 // Scalar Unigned Rounding Shift Right (Immediate) 34 // Scalar Signed Shift Right and Accumulate (Immediate) 41 // Scalar Unsigned Shift Right and Accumulate (Immediate) 48 // Scalar Signed Rounding Shift Right and Accumulate (Immediate) 55 // Scalar Unsigned Rounding Shift Right and Accumulate (Immediate) 62 // Scalar Shift Left (Immediate) 69 // Signed Saturating Shift Left (Immediate) [all...] |
/external/v8/src/arm/ |
assembler-arm-inl.h | 330 Operand::Operand(int32_t immediate, RelocInfo::Mode rmode) { 332 imm32_ = immediate; 455 // A movw / movt load immediate. 467 // A mov / orr load immediate. 550 // This is an movw / movt immediate load. Return the immediate. 559 // This is an mov / orr immediate load. Return the immediate. 591 // This is an movw / movt immediate load. Patch the immediate embedded i 596 uint32_t immediate = reinterpret_cast<uint32_t>(target); local 612 uint32_t immediate = reinterpret_cast<uint32_t>(target); local [all...] |
/external/v8/src/x87/ |
codegen-x87.cc | 152 __ sub(count, Immediate(4)); 153 __ add(src, Immediate(4)); 155 __ add(dst, Immediate(4)); 179 __ sub(src, Immediate(4)); 180 __ sub(count, Immediate(4)); 182 __ sub(dst, Immediate(4)); 267 __ cmp(edi, Immediate(masm->isolate()->factory()->empty_fixed_array())); 287 Immediate(masm->isolate()->factory()->fixed_double_array_map())); 339 __ sub(edi, Immediate(Smi::FromInt(1))); 381 __ cmp(edi, Immediate(masm->isolate()->factory()->empty_fixed_array())) [all...] |
/toolchain/binutils/binutils-2.25/cpu/ |
iq2000.cpu | 154 (dnf f-imm "immediate field" () 15 16) 373 (define-operand (name imm) (comment "immediate") (attrs) 402 (comment "high 16 bit immediate") 412 (comment "16 bit signed immediate, for low") 422 (comment "negated 16 bit signed immediate") 469 (dni addi2 "add immediate" (ALIAS NO-DIS USES-RS USES-RT) 475 (dni addi "add immediate" (USES-RS USES-RT) 481 (dni addiu2 "add immediate unsigned" (ALIAS NO-DIS USES-RS USES-RT) 487 (dni addiu "add immediate unsigned" (USES-RS USES-RT) 535 (dni andi2 "and immediate" (ALIAS NO-DIS USES-RS USES-RT [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.h | 107 // Vector shift by immediate: 112 // Vector rounding shift by immediate: 117 // Vector saturating shift by immediate: 125 // Vector saturating rounding shift by immediate: 139 // Vector move immediate and move negated immediate: 143 // Vector move f32 immediate: 178 // Vector OR with immediate 180 // Vector AND with NOT of immediate 293 /// isLegalICmpImmediate - Return true if the specified immediate is lega [all...] |
/toolchain/binutils/binutils-2.25/include/opcode/ |
m68k.h | 115 O an offset (or width): immediate data 0-31 or data register. 119 Q quick immediate data. Stored as 3 bits. 120 This matches an immediate operand only when value is in range 1 .. 8. 121 M moveq immediate data. Stored as 8 bits. 122 This matches an immediate operand only when value is in range -128..127 123 T trap vector immediate data. Stored as 4 bits. 128 # immediate data. Stored in special places (b, w or l) 130 ^ immediate data for floating point instructions. Special places 133 that is treated as immediate data. 210 @ data, but not immediate (modes 0,2-6,7.0-3 [all...] |
mips.h | 38 The 'i' format uses OP, RS, RT and IMMEDIATE. 46 The floating point 'i' format uses OP, RS, RT and IMMEDIATE. 395 11110 8 copies of immediate N, OB format 396 11101 4 copies of immediate N, QH format. */ 782 "i" 16 bit unsigned immediate (OP_*_IMMEDIATE) 783 "j" 16 bit signed immediate (OP_*_DELTA) 842 "%" 3 bit immediate vr5400 vector alignment operand (OP_*_VECALIGN) 846 "I" 32 bit immediate (value placed in imm_expr). 856 "Q" vector/scalar/immediate source (OP_*_VSEL and OP_*_FT) 872 "+f" 15 bit immediate for VCALLM [all...] |
/external/llvm/include/llvm/MC/ |
MCSymbolizer.h | 12 // immediate operands to MCExprs. 58 /// Instead of having a difficult to read immediate, a symbolic operand would 59 /// represent this immediate in a more understandable way, for instance as a
|
MCInstBuilder.h | 37 /// \brief Add a new integer immediate operand. 43 /// \brief Add a new floating point immediate operand.
|
/external/llvm/test/MC/ARM/ |
invalid-barrier.s | 10 @ CHECK: error: immediate value out of range 18 @ CHECK: error: immediate value out of range 27 @ CHECK: error: immediate value out of range
|
/external/llvm/test/MC/Disassembler/AArch64/ |
basic-a64-undefined.txt | 15 # Instructions notionally in the add/sub (immediate) sheet, but with 26 # Instructions notionally in the load/store (unsigned immediate) sheet. 45 # Instructions notionally in the move wide (immediate) sheet, but with out
|
/external/llvm/test/MC/PowerPC/ |
ppc64-errors.s | 27 # Signed 16-bit immediate operands 37 # Unsigned 16-bit immediate operands 47 # Signed 16-bit immediate operands (extended range for addis)
|
/external/v8/src/compiler/ |
js-graph.h | 108 Node* SmiConstant(int32_t immediate) { 109 DCHECK(Smi::IsValid(immediate)); 110 return Constant(immediate);
|
/external/v8/src/wasm/ |
encoder.h | 62 void EmitWithU8(WasmOpcode opcode, const byte immediate); 64 uint32_t EmitEditableImmediate(const byte immediate); 65 void EditImmediate(uint32_t offset, const byte immediate);
|
/toolchain/binutils/binutils-2.25/opcodes/ |
m10200-opc.c | 62 /* 8 bit unsigned immediate which may promote to a 16bit 63 unsigned immediate. */ 67 /* 16 bit unsigned immediate which may promote to a 32bit 68 unsigned immediate. */ 72 /* 16 bit pc-relative immediate which may promote to a 16bit 73 pc-relative immediate. */ 82 /* 24 immediate, low 16 bits in the main instruction 120 /* 8 bit signed immediate which may promote to 16bit signed immediate. */ 124 /* 16 bit signed immediate which may promote to 32bit immediate. * [all...] |
/toolchain/binutils/binutils-2.25/gprof/ |
tahoe.c | 51 immediate, absolute, byterel, bytereldef, wordrel, wordreldef, enumerator in enum:tahoe_opermodes 88 return usesreg != 0xe ? autoinc : immediate; 144 case immediate: 145 return "immediate"; 185 case immediate: 258 case immediate:
|
vax.c | 51 immediate, absolute, byterel, bytereldef, wordrel, wordreldef, enumerator in enum:opermodes 100 return usesreg != PC ? autoinc : immediate; 156 case immediate: 157 return "immediate"; 196 case immediate: 270 case immediate:
|
/external/llvm/test/MC/Hexagon/instructions/ |
xtype_shift.s | 4 # Shift by immediate 18 # Shift by immediate and accumulate 52 # Shift by immediate and add 56 # Shift by immediate and logical 98 # Shift right by immediate with rounding 104 # Shift left by immediate with saturation 210 # Vector shift halfwords by immediate 238 # Vector shift words by immediate
|
/external/v8/src/compiler/mips/ |
instruction-codes-mips.h | 117 // I = immediate (handle, external, int32) 118 // MRI = [register + immediate]
|
/external/v8/src/compiler/mips64/ |
instruction-codes-mips64.h | 144 // I = immediate (handle, external, int32) 145 // MRI = [register + immediate]
|