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  /toolchain/binutils/binutils-2.25/include/opcode/
ns32k.h 46 A : double-word gen-address-form ie no regs, no immediate
47 I : integer writeable gen int except immediate (A + reg)
48 Z : floating writeable gen float except immediate (Z + freg)
53 i : immediate (8 bits)
80 6 size in bytes of immediate
142 * I : integer not immediate
143 * Z : floating not immediate
146 * i : immediate (8 bits)
i860.h 50 any situation where the immediate operand does not fit in 32 bits.
74 i 16 bit immediate.
75 I 16 bit immediate, aligned 2^0. (ld.b)
76 J 16 bit immediate, aligned 2^1. (ld.s)
77 K 16 bit immediate, aligned 2^2. (ld.l, {p}fld.l, fst.l)
78 L 16 bit immediate, aligned 2^3. ({p}fld.d, fst.d)
79 M 16 bit immediate, aligned 2^4. ({p}fld.q, fst.q)
80 5 5 bit immediate.
81 l lbroff 26 bit PC relative immediate.
82 r sbroff 16 bit PC relative immediate
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  /toolchain/binutils/binutils-2.25/include/vms/
etir.h 41 #define ETIR__C_STO_IMMR 54 /* Store immediate Repeated. */
47 #define ETIR__C_STO_IMM 61 /* Store immediate. */
  /toolchain/binutils/binutils-2.25/opcodes/
moxie-opc.c 43 vvvvvvvv - 8-bit immediate value
51 vvvvvvvvvv - 10-bit immediate value. */
fr30-desc.c 417 /* u4: 4 bit unsigned immediate */
421 /* u4c: 4 bit unsigned immediate */
425 /* u8: 8 bit unsigned immediate */
429 /* i8: 8 bit unsigned immediate */
433 /* udisp6: 6 bit unsigned immediate */
437 /* disp8: 8 bit signed immediate */
441 /* disp9: 9 bit signed immediate */
445 /* disp10: 10 bit signed immediate */
449 /* s10: 10 bit signed immediate */
453 /* u10: 10 bit unsigned immediate */
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m32c-asm.c 117 return _("imm:6 immediate is out of range");
159 return _("dsp:8 immediate is out of range");
163 return _("dsp:8 immediate is out of range");
184 return _("Immediate is out of range -8 to 7");
188 return _("Immediate is out of range -8 to 7");
209 return _("Immediate is out of range -7 to 8");
213 return _("Immediate is out of range -7 to 8");
253 return _("dsp:8 immediate is out of range");
305 return _("dsp:16 immediate is out of range");
312 return _("dsp:16 immediate is out of range")
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  /external/v8/src/arm64/
disasm-arm64.cc 220 // The immediate encoded in the instruction is not in the expected format.
707 // If the top bit of the immediate is clear, the tested register is
708 // disassembled as Wt, otherwise Xt. As the top bit of the immediate is
727 // be overwritten. Movn and movz print the computed immediate, which includes
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  /system/core/libpixelflinger/codeflinger/
MIPS64Assembler.cpp 205 uint32_t immediate, uint32_t& rot, uint32_t& imm)
207 // for MIPS, any 32-bit immediate is OK
209 imm = immediate;
215 bool ArmToMips64Assembler::isValidImmediate(uint32_t immediate)
217 // for MIPS, any 32-bit immediate is OK
221 uint32_t ArmToMips64Assembler::imm(uint32_t immediate)
223 amode.value = immediate;
249 // LDR(B)/STR(B)/PLD (immediate and Rm can be negative, which indicate U=0)
253 "LDR(B)/STR(B)/PLD immediate too big (%08x)",
263 "LDR(B)/STR(B)/PLD immediate too big (%08x)"
    [all...]
MIPSAssembler.cpp 211 uint32_t immediate, uint32_t& rot, uint32_t& imm)
213 // for MIPS, any 32-bit immediate is OK
215 imm = immediate;
221 bool ArmToMipsAssembler::isValidImmediate(uint32_t immediate)
223 // for MIPS, any 32-bit immediate is OK
227 uint32_t ArmToMipsAssembler::imm(uint32_t immediate)
229 // ALOGW("immediate value %08x at pc %08x\n", immediate, (int)pc());
230 amode.value = immediate;
256 // LDR(B)/STR(B)/PLD (immediate and Rm can be negative, which indicate U=0
    [all...]
Arm64Assembler.cpp 86 ** - Wherever possible, immediate values are transferred to temporary
88 ** as instructions requiring immediate values are converted to
89 ** move immediate instructions followed by register-register instruction.
362 //Store immediate in temporary register and convert
363 //immediate operation into register operation
366 int imm = mAddrMode.immediate;
484 int imm = mAddrMode.immediate;
587 int imm = mAddrMode.immediate;
861 uint32_t immediate, uint32_t& rot, uint32_t& imm)
864 imm = immediate;
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  /toolchain/binutils/binutils-2.25/gas/config/
tc-arm.c 306 - Immediate operands do not require a # prefix.
317 - Immediate operands do not require a # prefix.
328 /* An immediate operand can start with #, and ld*, st*, pld operands
410 unsigned immisalign : 1; /* Immediate is an alignment specifier. */
411 unsigned immisfloat : 1; /* Immediate was parsed as a float. */
414 unsigned regisimm : 1; /* 64-bit immediate, reg forms high 32 bits. */
894 /* Prefix characters that indicate the start of an immediate
946 immediates, as can be used in Neon VMVN and VMOV immediate instructions. */
966 inst.error = _("immediate expression requires a # prefix");
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tc-sh64.c 57 expressionS immediate; member in struct:__anon75647
59 /* If IMMEDIATE was a shift-expression, like "(S >> N) & 65535", where
62 corresponding reloc-type here and modify the "immediate" expression
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tc-cris.c 64 Although the same bit-pattern, we handle BDAP with an immediate
110 /* The size in bytes of an immediate expression, or zero if
862 /* We had a quick immediate branch, now turn it into a word one i.e. a
912 /* We had a quick immediate branch or a word immediate ba. Now
971 /* We had a BDAP 8-bit "quick immediate", now turn it into a 16-bit
    [all...]
  /art/compiler/utils/arm/
assembler_arm32.h 162 // Returns false if the immediate cannot be encoded.
301 uint32_t immediate,
306 bool ShifterOperandCanAlwaysHold(uint32_t immediate) OVERRIDE;
310 // Emit data (e.g. encoded instruction or immediate) to the
401 bool ShifterOperandCanHoldArm32(uint32_t immediate, ShifterOperand* shifter_op);
  /external/libchrome/sandbox/win/src/sidestep/
mini_disassembler.cpp 163 // Let's process the operand types to see if we have any immediate
209 // additional (e.g. immediate) parameters.
232 // decoded. No other (e.g. immediate) params than indicated in ModR/M.
244 // These addressing modes specify an immediate or an offset value
247 case AM_I: // Immediate data.
  /toolchain/binutils/binutils-2.25/gas/doc/
c-m32r.texi 189 places the lower 16-bits of the result into the immediate-field of the
200 places the upper 16-bits of the result into the immediate-field of the
212 the upper 16-bits of the result into the immediate-field of the
233 treats its 16-bit immediate argument as unsigned whereas the
234 @code{add3} treats its 16-bit immediate as a signed value. So for
c-s390.texi 180 @item n @tab and instruction, for example @samp{ni} and immediate
202 @item i @tab the instruction uses an immediate operand
226 in registers, immediate operands, and operands in storage.
232 Immediate operands are contained within the instruction and can have
233 8, 16 or 32 bits. The field containing the immediate operand is called
248 immediate field multiplied by two.
315 @item Ix @tab Signed immediate for operand x.
316 @item Ux @tab Unsigned immediate for operand x.
667 The @@got modifier can be used for displacement fields, 16-bit immediate
668 fields and 32-bit pc-relative immediate fields. The @@got12 modifier i
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  /external/google-breakpad/src/third_party/libdisasm/
libdis.h 161 op_immediate = 2, /* Immediate Value */
242 /* immediate values */
681 /* Get Immediate: return the x86_op_t containing the immediate operand
682 * for this instruction, or NULL if there is no immediate operand. There
683 * can be only one immediate operand per instruction */
686 /* Get Raw Immediate Data: returns a pointer to the immediate data encoded
689 * screwed up the conversion of the immediate data. Note that 'imm' in this
690 * context refers to immediate data encoded at the end of an instruction a
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  /toolchain/binutils/binutils-2.25/opcodes/po/
zh_CN.po 405 msgid "immediate value cannot be register"
409 msgid "immediate value out of range"
585 #. I and Z are output operands and can`t be immediate
587 #. * an immediate either. We don't know how much to increase
730 msgid "immediate value is out of range"
754 msgid "immediate value not in range and not even"
758 msgid "immediate value must be even"
782 msgid "Bad immediate expression"
786 msgid "No relocation for small immediate"
790 msgid "Small operand was not an immediate number
    [all...]
  /external/valgrind/none/tests/ppc32/
jm-insns.c 42 * of register operands needed), patch the test opcode if any immediate
101 * Details of intruction patching for immediate operands
103 * All the immediate insn test functions are of the form {imm_insn, blr}
105 * to a stack buffer, and rewrite the immediate part of imm_insn.
133 * the immediate field with the new value (which, for 'addi', is the
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  /external/clang/include/clang/Basic/
arm_neon.td 269 // For immediate checks: the immediate will be assumed to specify the lane of
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  /external/llvm/lib/Target/Mips/AsmParser/
MipsAsmParser.cpp 585 k_Immediate, /// An immediate (possibly involving symbol references)
808 // Add as immediate when possible. Null MCExpr = 0.
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  /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/ddk/
scsi.h 741 UCHAR Immediate:1;
782 UCHAR Immediate:1
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  /toolchain/binutils/binutils-2.25/cpu/
fr30.cpu 188 (dnf f-i32 "32 bit immediate" (SIGN-OPT) 16 32)
440 (dnop u4 "4 bit unsigned immediate" (HASH-PREFIX) h-uint f-u4)
441 (dnop u4c "4 bit unsigned immediate" (HASH-PREFIX) h-uint f-u4c)
442 (dnop u8 "8 bit unsigned immediate" (HASH-PREFIX) h-uint f-u8)
443 (dnop i8 "8 bit unsigned immediate" (HASH-PREFIX) h-uint f-i8)
444 (dnop udisp6 "6 bit unsigned immediate" (HASH-PREFIX) h-uint f-udisp6)
445 (dnop disp8 "8 bit signed immediate" (HASH-PREFIX) h-sint f-disp8)
446 (dnop disp9 "9 bit signed immediate" (HASH-PREFIX) h-sint f-disp9)
447 (dnop disp10 "10 bit signed immediate" (HASH-PREFIX) h-sint f-disp10)
449 (dnop s10 "10 bit signed immediate" (HASH-PREFIX) h-sint f-s10
    [all...]
  /external/llvm/lib/Target/X86/Utils/
X86ShuffleDecode.cpp 32 // Decode the immediate.
269 /// immediate mask into a shuffle mask.
373 // If there are more than 8 elements in the vector, then any immediate blend
375 // 8 elements in a 128-bit lane with an immediate blend.
378 "Immediate blends only operate over 8 elements at a time!");
466 // Only the bottom 6 bits are valid for each immediate.
501 // Only the bottom 6 bits are valid for each immediate.

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