| /external/llvm/include/llvm/Support/ |
| ARMWinEH.h | 74 /// to setup a frame chain for fast walking. If this flag is set, r11 is
89 /// + L flag must be set since frame chaining requires r11 and lr
90 /// + r11 must NOT be included in the set of registers described by Reg
171 "L flag must be set, chaining requires r11 and LR");
173 "r11 must not be included in Reg; C implies r11");
|
| /art/compiler/utils/arm/ |
| assembler_thumb2_test.cc | 60 new arm::Register(arm::R11),
335 // So we use (R11, IP) (e.g. (R11, R12)) as source registers in the
337 __ StoreToOffset(type, arm::R11, arm::SP, offset);
338 __ StoreToOffset(type, arm::R11, arm::R5, offset);
342 "strd r11, ip, [sp, #1020]\n"
343 "strd r11, ip, [r5, #1020]\n";
354 // regarding the use of (R11, IP) (e.g. (R11, R12)) as source
356 __ StoreToOffset(type, arm::R11, arm::SP, offset)
[all...] |
| /external/libavc/common/arm/ |
| ih264_deblk_chroma_a9.s | 374 ldr r11, [sp, #16] @r12 = ui_Bs
405 rev r11, r11 @Blocking strengths
408 vmov.32 d10[0], r11
591 ldr r11, [sp, #16] @r11 = ui_Bs
615 rev r11, r11 @Blocking strengths
617 vmov.32 d22[0], r11
[all...] |
| ih264_inter_pred_luma_horz_qpel_vert_qpel_a9q.s | 145 add r11, r6, #8
164 vld1.32 {q9}, [r11], r2 @ horz row 0, col 1
214 vld1.32 {q9}, [r11], r2 @ horz row 1, col 1
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCAsmPrinter.cpp | 404 // Load the new TOC pointer and the function address, but not r11
[all...] |
| /external/boringssl/src/crypto/aes/asm/ |
| aes-x86_64.pl | 1009 my ($tp18,$tp28,$tp48,$tp88,$acc8)=("%rcx","%r11","%r12","%r13","%rdx");
[all...] |
| /external/v8/src/third_party/valgrind/ |
| valgrind.h | 214 branch-and-link-to-r11. VALGRIND_CALL_NOREDIR is just text, not a
453 /* branch-and-link-to-noredir *%R11 */ \
519 /* branch-and-link-to-noredir *%R11 */ \
568 "orr r11, r11, r11\n\t" \
[all...] |
| /external/libgdx/extensions/gdx-bullet/jni/src/bullet/BulletCollision/CollisionDispatch/ |
| btBoxBoxDetector.cpp | 271 btScalar A[3],B[3],R11,R12,R13,R21,R22,R23,R31,R32,R33,
288 R11 = dDOT44(R1+0,R2+0); R12 = dDOT44(R1+0,R2+1); R13 = dDOT44(R1+0,R2+2);
292 Q11 = btFabs(R11); Q12 = btFabs(R12); Q13 = btFabs(R13);
368 TST(pp[0]*R31-pp[2]*R11,(A[0]*Q31+A[2]*Q11+B[1]*Q23+B[2]*Q22),R31,0,-R11,10);
373 TST(pp[1]*R11-pp[0]*R21,(A[0]*Q21+A[1]*Q11+B[1]*Q33+B[2]*Q32),-R21,R11,0,13);
|
| /external/valgrind/coregrind/m_debuginfo/ |
| priv_storage.h | 186 CFIC_ARM_R11REL -> r11 + cfa_off
190 old_r14/r13/r12/r11/r7/ra
191 = case r14/r13/r12/r11/r7/ra_how of
193 CFIR_SAME -> same as it was before (r14/r13/r12/r11/r7 only)
194 CFIR_CFAREL -> cfa + r14/r13/r12/r11/r7/ra_off
195 CFIR_MEMCFAREL -> *( cfa + r14/r13/r12/r11/r7/ra_off )
196 CFIR_EXPR -> expr whose index is in r14/r13/r12/r11/r7/ra_off
214 (r15), the frame pointer r11 (like BP) and together with the instruction
218 CFIC_IA_BPREL -> r11 + cfa_off
[all...] |
| /external/boringssl/src/crypto/sha/asm/ |
| sha512-x86_64.pl | 134 "%r8", "%r9", "%r10","%r11");
257 lea OPENSSL_ia32cap_P(%rip),%r11
258 mov 0(%r11),%r9d
259 mov 4(%r11),%r10d
260 mov 8(%r11),%r11d
293 mov %rsp,%r11 # copy %rsp
301 mov %r11,$_rsp # save copy of %rsp
753 mov %rsp,%r11 # copy %rsp
761 mov %r11,$_rsp # save copy of %rsp
1097 mov %rsp,%r11 # copy %rs
[all...] |
| /external/elfutils/tests/ |
| run-readelf-mixed-corenote.sh | 37 r9: 0 r10: -1225703496 r11: -1091672844
106 r10: 2571552016 r11: 0
168 r8: -1723238816 r9: -1723388288 r10: -1723388288 r11: 0
240 r11: 266286012928 r10: 140734971656256
513 r11: 4145779200 r10: 0
|
| /external/llvm/lib/Target/X86/ |
| X86RegisterInfo.td | 143 def R11 : X86Reg<"r11", 11, [R11D]>, DwarfRegNum<[11, -2, -2]>;
349 (add RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11,
376 R8, R9, R11, RIP)>;
378 R8, R9, R10, R11, RIP)>;
|
| /external/llvm/test/CodeGen/X86/ |
| anyregcc.ll | 324 tail call void asm sideeffect "nop", "~{ax},~{bx},~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
362 tail call void asm sideeffect "nop", "~{ax},~{bx},~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
377 ;SSE: pushq %r11
409 ;AVX: pushq %r11
434 call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{rbp},~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15}"()
|
| /external/llvm/test/MC/ARM/ |
| eh-directive-setfp.s | 43 @ The assembler should emit 0x9B to copy stack pointer from r11.
85 @ The assembler should emit 0x9B to copy stack pointer from r11.
128 @ The assembler should emit 0x9B to copy stack pointer from r11.
171 @ The assembler should emit 0x9B to copy stack pointer from r11.
229 @ The assembler should emit 0x9B to copy stack pointer from r11.
|
| /external/v8/test/cctest/ |
| test-disasm-x64.cc | 515 __ vmovss(xmm9, Operand(r11, rcx, times_8, -10000));
555 __ vcvtqsi2sd(xmm5, xmm9, r11);
597 __ vfmadd132sd(xmm9, xmm10, Operand(r9, r11, times_4, 10000));
599 __ vfmadd213sd(xmm9, xmm10, Operand(r9, r11, times_4, 10000));
601 __ vfmadd231sd(xmm9, xmm10, Operand(r9, r11, times_4, 10000));
|
| /external/valgrind/none/tests/amd64/ |
| redundantRexW.c | 343 /* movhps reg, mem 49 0f 17 03 rex.WB movhps %xmm0,(%r11) */
350 "\tmovq %%r15, %%r11\n"
351 "\t.byte 0x49,0x0F,0x17,0x03\n" /* rex.WB movhps %xmm0,(%r11) */
355 "r11"
357 after_test( "rex.WB movhps %xmm0,(%r11)", regs, mem );
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i860/ |
| xp.d | 26 40: 00 58 00 39 st.c %r11,%p0
191 2d4: 04 fc 6c 65 pfld.q -1024\(%r11\),%f12
208 318: 05 fc 74 65 pfld.q -1024\(%r11\)\+\+,%f20
223 354: 04 80 70 61 pfld.q %r16\(%r11\),%f16
238 390: 05 80 6c 61 pfld.q %r16\(%r11\)\+\+,%f12
|
| /external/antlr/antlr-3.4/runtime/Ruby/test/functional/ast-output/ |
| construction.rb | 81 r11
422 ast_test :input => "1+2", :rule => :r11, :ast => "(EXPR (+ 1 2))"
424 ast_test :input => "", :rule => :r11, :ast => "EXPR"
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonRegisterInfo.td | 102 def D5 : Rd<10, "r11:10", [R10, R11]>, DwarfRegNum<[42]>;
206 R10, R11, R29, R30, R31)> {
|
| /external/valgrind/coregrind/m_dispatch/ |
| dispatch-s390x-linux.S | 228 lg %r11, 8(%r8,%r7) /* .host */
233 r11 is an address. There we will find the instrumented client code.
235 br %r11
|
| /prebuilts/go/darwin-x86/src/cmd/internal/rsc.io/x86/x86asm/ |
| inst.go | 215 R11
550 R11: "R11",
|
| /prebuilts/go/linux-x86/src/cmd/internal/rsc.io/x86/x86asm/ |
| inst.go | 215 R11
550 R11: "R11",
|
| /external/boringssl/src/crypto/rc4/asm/ |
| rc4-x86_64.pl | 140 mov $len,%r11
144 my $len="%r11"; # reassign input arguments
445 xor %r11,%r11
596 lea 56(%rsi),%r11 # &disp->HandlerData
599 mov %r11,40(%rsp) # arg6
|
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineAndOrXor.cpp | 638 Value *R11,*R12;
640 if (decomposeBitTestICmp(RHS, RHSCC, R11, R12, R2)) {
641 if (R11 == L11 || R11 == L12 || R11 == L21 || R11 == L22) {
642 A = R11; D = R12;
644 A = R12; D = R11;
650 if (!match(R1, m_And(m_Value(R11), m_Value(R12)))) {
653 R11 = R1
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| x86-64-xop.d | 315 [ ]*[a-f0-9]+: c4 03 7d 49 04 1e 33[ ]+vpermil2pd \$0x3,%ymm3,\(%r14,%r11,1\),%ymm0,%ymm8
317 [ ]*[a-f0-9]+: c4 03 7d 49 04 1e 72[ ]+vpermil2pd \$0x2,%ymm7,\(%r14,%r11,1\),%ymm0,%ymm8
319 [ ]*[a-f0-9]+: c4 83 25 49 2c 1e 81[ ]+vpermil2pd \$0x1,%ymm8,\(%r14,%r11,1\),%ymm11,%ymm5
325 [ ]*[a-f0-9]+: c4 03 8d 49 44 1d 00 13[ ]+vpermil2pd \$0x3,0x0\(%r13,%r11,1\),%ymm1,%ymm14,%ymm8
327 [ ]*[a-f0-9]+: c4 83 85 49 44 1d 00 11[ ]+vpermil2pd \$0x1,0x0\(%r13,%r11,1\),%ymm1,%ymm15,%ymm0
354 [ ]*[a-f0-9]+: c4 83 85 48 64 1d 00 c3[ ]+vpermil2ps \$0x3,0x0\(%r13,%r11,1\),%ymm12,%ymm15,%ymm4
359 [ ]*[a-f0-9]+: c4 83 fd 48 64 1d 00 00[ ]+vpermil2ps \$0x0,0x0\(%r13,%r11,1\),%ymm0,%ymm0,%ymm4
[all...] |
