| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i860/ |
| system.d | 33 5c: 00 58 40 38 st.c %r11,%dirbase
52 a8: 04 fc 60 35 flush -1024\(%r11\)
|
| xp.s | 26 st.c %r11,%p0
208 pfld.q -1024(%r11),%f12
227 pfld.q -1024(%r11)++,%f20
244 pfld.q %r16(%r11),%f16
261 pfld.q %r16(%r11)++,%f12
|
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-x86-64/ |
| tlsbinpic.s | 134 movq sl5@gottpoff(%rip), %r11
136 movq %fs:(%r11), %r12
|
| /prebuilts/go/darwin-x86/src/runtime/ |
| asm_ppc64x.s | 140 MOVD gobuf_ctxt(R5), R11
170 MOVD fn+0(FP), R11 // context
171 MOVD 0(R11), R4 // code pointer
192 MOVD R3, R11 // context
234 MOVD 0(R11), R3 // code pointer
248 MOVD 0(R11), R3 // code pointer
281 MOVD R11, (g_sched+gobuf_ctxt)(g)
304 MOVD R0, R11
393 MOVD f+8(FP), R11; \
394 MOVD (R11), R31;
[all...] |
| sys_darwin_amd64.s | 133 MOVL nt_scale(BP), R11
148 MULQ R11
373 MOVL notify+28(FP), R11
374 PUSHQ R11 // seventh arg, on stack
377 POPQ R11
|
| /prebuilts/go/linux-x86/src/runtime/ |
| asm_ppc64x.s | 140 MOVD gobuf_ctxt(R5), R11
170 MOVD fn+0(FP), R11 // context
171 MOVD 0(R11), R4 // code pointer
192 MOVD R3, R11 // context
234 MOVD 0(R11), R3 // code pointer
248 MOVD 0(R11), R3 // code pointer
281 MOVD R11, (g_sched+gobuf_ctxt)(g)
304 MOVD R0, R11
393 MOVD f+8(FP), R11; \
394 MOVD (R11), R31;
[all...] |
| sys_darwin_amd64.s | 133 MOVL nt_scale(BP), R11
148 MULQ R11
373 MOVL notify+28(FP), R11
374 PUSHQ R11 // seventh arg, on stack
377 POPQ R11
|
| /external/libunwind/src/ia64/ |
| Ginstall_cursor.S | 142 and r11 = 0x1c, r10 // clear all but rsc.be and rsc.pl
242 mov.m ar.rsc = r11 // put RSE into enforced lazy mode
257 dep r11 = r2, r11, 16, 16
262 mov.m ar.rsc = r11 // 14 cycles latency to loadrs
|
| /external/llvm/lib/Target/ARM/ |
| ARMCallingConv.td | 106 CCIfType<[i32], CCAssignToReg<[R4, R5, R6, R7, R8, R9, R10, R11]>>
210 def CSR_AAPCS : CalleeSavedRegs<(add LR, R11, R10, R9, R8, R7, R6, R5, R4,
217 def CSR_AAPCS_ThisReturn : CalleeSavedRegs<(add LR, R11, R10, R9, R8, R7, R6,
241 // FIXME: we mark R11 as callee-saved since it's often the frame-pointer, and
244 def CSR_FIQ : CalleeSavedRegs<(add LR, R11, (sequence "R%u", 7, 0))>;
|
| /external/llvm/test/CodeGen/X86/ |
| hhvm-cc.ll | 49 ; CHECK-DAG: movl $11, %r11
64 %r11 = insertvalue %rettype %r10, i64 11, 10
65 %r12 = insertvalue %rettype %r11, i64 12, 11
90 ; CHECK-DAG: movl $13, %r11
138 ; CHECK-DAG: movl $13, %r11
|
| /external/valgrind/coregrind/m_dispatch/ |
| dispatch-tilegx-linux.S | 223 addli r11, r50, OFFSET_tilegx_pc
224 ld r11, r11
237 move r14, r11
258 sub r7, r12, r11
|
| /external/zlib/src/contrib/gcc_gvmat64/ |
| gvmat64.S | 68 ; register used : rax,rbx,rcx,rdx,rsi,rdi,r8,r9,r10,r11,r12
176 ; rax, rcx, rdx, r8, r9, r10, and r11, which are scratch.
283 lea rsi,[r10+r11]
290 movzx ebx, word ptr [r9 + r11 - 1]
505 lea rsi,[r10+r11]
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cris/ |
| prefix.d | 15 [ ]+1c:[ ]+7fb1 564a[ ]+move\.w \[\$?r11\+127\],\$?r4
54 [ ]+110:[ ]+5b2d 555e[ ]+move\.w \[\$?r5=\$?r2\+\[\$?r11\+\]\.w\],\$?r5
61 [ ]+12c:[ ]+6bc5 564e[ ]+move\.w \[\$?r6=\$?r11\+\$?r12\.d\],\$?r4
91 [ ]+1c0:[ ]+7b09 674a[ ]+move\.d \[\[\$?r11\]\],\$?r4
93 [ ]+1c8:[ ]+7b0d[ ]+dip \[\$?r11\+\]
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ppc/ |
| power8.d | 12 8: (7e 8b 56 5d|5d 56 8b 7e) tabortdc\. 20,r11,r10
45 8c: (7f 13 5a 28|28 5a 13 7f) lqarx r24,r19,r11
46 90: (7e c0 5a 28|28 5a c0 7e) lqarx r22,0,r11
121 1bc: (7e 0b 01 67|67 01 0b 7e) mtvsrd vs48,r11
127 1d4: (7e e0 5d 19|19 5d e0 7e) stxsspx vs55,0,r11
|
| 476.d | 77 10c: (7d 6a 00 34|34 00 6a 7d) cntlzw r10,r11
78 110: (7d 6a 00 35|35 00 6a 7d) cntlzw\. r10,r11
100 168: (7d 4b 61 0c|0c 61 4b 7d) dcbtstls 10,r11,r12
107 184: (7d 4b 63 d6|d6 63 4b 7d) divw r10,r11,r12
108 188: (7d 6c 6b d7|d7 6b 6c 7d) divw\. r11,r12,r13
109 18c: (7d 4b 67 d6|d6 67 4b 7d) divwo r10,r11,r12
110 190: (7d 6c 6f d7|d7 6f 6c 7d) divwo\. r11,r12,r13
111 194: (7d 4b 63 96|96 63 4b 7d) divwu r10,r11,r12
112 198: (7d 6c 6b 97|97 6b 6c 7d) divwu\. r11,r12,r13
113 19c: (7d 4b 67 96|96 67 4b 7d) divwuo r10,r11,r1
[all...] |
| common.d | 77 108: (7d 6a 62 39|39 62 6a 7d) eqv. r10,r11,r12
78 10c: (7d 6a 62 38|38 62 6a 7d) eqv r10,r11,r12
101 168: (7d 4b 64 6e|6e 64 4b 7d) lfsux f10,r11,r12
102 16c: (7d 4b 64 2e|2e 64 4b 7d) lfsx f10,r11,r12
105 178: (7d 2a 5a ee|ee 5a 2a 7d) lhaux r9,r10,r11
106 17c: (7d 2a 5a ae|ae 5a 2a 7d) lhax r9,r10,r11
172 284: (99 61 00 02|02 00 61 99) stb r11,2\(r1\)
|
| /external/v8/src/x64/ |
| code-stubs-x64.cc | 623 __ movp(r11, rbx);
629 r11, Operand(rax, ArgumentsAdaptorFrameConstants::kLengthOffset));
630 __ leap(rdx, Operand(rax, r11, times_pointer_size,
634 // r11 = argument count (untagged)
635 // Compute the mapped parameter count = min(rbx, r11) in rbx.
636 __ cmpp(rbx, r11);
638 __ movp(rbx, r11);
654 __ leap(r8, Operand(r8, r11, times_pointer_size, FixedArray::kHeaderSize));
663 // r11 = argument count (untagged)
681 // r11 = argument count (untagged
701 r11); local
771 __ movp(FieldOperand(rdi, FixedArray::kLengthOffset), r11); local
[all...] |
| /external/valgrind/VEX/priv/ |
| host_amd64_defs.c | 109 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15" };
2942 HReg r11 = hregAMD64_R11(); local
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
| opc-a.d | 26 56: b0 00 28 00 42 80 mov r11=r10
41 a6: b0 00 30 58 44 02 \(p03\) and r11=-128,r12
43 b0: 00 58 00 18 2e 22 \[MII\] or r11=-128,r12
45 bc: 01 60 bc 88 xor r11=-128,r12
47 c6: b0 00 30 5a 44 00 andcm r11=-128,r12
51 dc: e1 f9 4c 80 shladd r11=r30,4,r31
55 f0: 00 58 78 3e 1b 20 \[MII\] shladdp4 r11=r30,4,r31
57 fc: e1 f9 04 82 padd1\.sss r11=r30,r31
66 12c: e1 f9 14 82 psub1\.sss r11=r30,r31
86 196: a0 58 30 a0 41 40 pshladd2 r10=r11,1,r1
[all...] |
| /external/libhevc/common/arm/ |
| ihevc_itrans_recon_32x32.s | 95 @ word32 r11 )
106 @ r11
138 @#define zero_rows r11
161 ldr r11,[sp,#72]
175 @ r10,r9,r11,r12
237 cmp r11,r10
272 cmp r11,r9
308 cmp r11,r5
346 cmp r11,r7
578 cmp r11,r1
[all...] |
| ihevc_intra_pred_chroma_mode_3_to_9.s | 150 mov r11, r4, lsl #1 @col counter to be inc/dec by #8
293 subs r11, r11, #8 @decrement the processed col
299 movle r11, r4, lsl #1
328 subs r11, r11, #8
365 movle r11, r4, lsl #1
|
| ihevc_intra_pred_luma_mode_3_to_9.s | 157 mov r11, r4 @col counter to be inc/dec by #8
294 subs r11, r11, #8
300 movle r11, r4
325 subs r11, r11, #8
368 addle r11, r4, #8
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/or1k/ |
| allinsn.s | 192 l.lhs r6,-142(r11)
242 l.slli r11,r14,49
282 l.srai r10,r11,28
324 l.sub r11,r4,r18
383 l.mulu r1,r18,r11
403 l.divu r8,r11,r29
404 l.divu r11,r19,r2
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/epiphany/ |
| allinsn.s | 239 jalr r11
275 ldrb r58,[r11],r25
389 ldr r12,[r4],r11
449 ldrd r58,[r32],r11
559 strh r57,[r11,r9]
603 strh r11,[fp,631]
1246 eor r11,r10,r43
1268 asr ip,r7,r11
1486 fsub r1,r56,r11
|
| /external/valgrind/include/ |
| valgrind.h | 251 branch-and-link-to-r11. VALGRIND_CALL_NOREDIR is just text, not a
527 /* branch-and-link-to-noredir *%R11 */ \
606 /* branch-and-link-to-noredir *%R11 */ \
[all...] |
