| /external/llvm/lib/Target/X86/ |
| X86InstrAVX512.td | [all...] |
| /external/v8/src/arm/ |
| macro-assembler-arm.cc | 905 vcmp(src1, src2, cond);
914 vcmp(src1, src2, cond);
924 vcmp(src1, src2, cond);
933 vcmp(src1, src2, cond);
[all...] |
| simulator-arm.cc | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMScheduleSwift.td | 589 (instregex "VCMP(D|S|ZD|ZS)$", "VCMPE(D|S|ZD|ZS)")>;
[all...] |
| /art/disassembler/ |
| disassembler_arm.cc | [all...] |
| /toolchain/binutils/binutils-2.25/opcodes/ |
| i386-dis.c | 420 #define VCMP { VCMP_Fixup, 0 }
[all...] |
| ChangeLog-2008 | 677 (VCMP): Likewise.
[all...] |
| arm-dis.c | 347 {FPU_VFP_EXT_V1xD, 0x0eb50a40, 0x0fbf0f70, "vcmp%7'e%c.f32\t%y1, #0.0"},
348 {FPU_VFP_EXT_V1, 0x0eb50b40, 0x0fbf0f70, "vcmp%7'e%c.f64\t%z1, #0.0"},
361 {FPU_VFP_EXT_V1xD, 0x0eb40a40, 0x0fbf0f50, "vcmp%7'e%c.f32\t%y1, %y0"},
362 {FPU_VFP_EXT_V1, 0x0eb40b40, 0x0fbf0f50, "vcmp%7'e%c.f64\t%z1, %z0"},
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | [all...] |
| PPCISelLowering.cpp | [all...] |
| PPCInstrInfo.td | 210 def PPCvcmp : SDNode<"PPCISD::VCMP" , SDT_PPCvcmp, []>;
[all...] |
| /toolchain/binutils/binutils-2.25/gas/ |
| ChangeLog-2006 | [all...] |
| ChangeLog | 529 (asm_opcode_insns): Use RSVD_FI0 for second operand of vcmp, vcmpe.
[all...] |
| /art/compiler/utils/ |
| assembler_thumb_test_expected.cc.inc | 663 " 0: eeb4 0a60 vcmp.f32 s0, s1\n",
664 " 4: eeb4 0b41 vcmp.f64 d0, d1\n",
665 " 8: eeb5 1a40 vcmp.f32 s2, #0.0\n",
666 " c: eeb5 2b40 vcmp.f64 d2, #0.0\n",
[all...] |
| /external/llvm/lib/Target/X86/AsmParser/ |
| X86AsmParser.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfoV4.td | [all...] |
| /toolchain/binutils/binutils-2.25/gas/config/ |
| tc-arm.c | [all...] |
