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  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/score/
addi.s 5 * (2)addei! rD, imm4 : rD = rD + 2**imm4
8 * (2)subei! rD, imm4 : rD = rD + 2**imm4
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cr16/
add_test.s 5 # ADDB imm4/imm16, reg
24 # ADDCB imm4/imm16, reg
43 # ADDCW imm4/imm16, reg
62 # ADDW imm4/imm16, reg
80 # ADDD imm4/imm16/imm20/imm32, regp
sub_test.s 5 # SUBB imm4/imm16, reg
23 # SUBCB imm4/imm16, reg
41 # SUBCW imm4/imm16, reg
59 # SUBW imm4/imm16, reg
77 # SUBD imm4/imm16/imm32, regp
and_test.s 5 # ANDB imm4/imm16, reg
23 # ANDW imm4/imm16, reg
41 # ANDD imm4/imm16/imm32, regp
cmp_test.s 5 # CMPB imm4/imm16, reg
24 # CMPW imm4/imm16, reg
44 # CMPD imm4/imm16/imm32, regp
mov_test.s 5 # MOVB imm4/imm16, reg
24 # MOVW imm4/imm16, reg
44 # MOVD imm4/imm16/imm20/imm32, regp
mul_test.s 5 # MULB imm4/imm16, reg
23 # MULW imm4/imm16, reg
or_test.s 5 # ORB imm4/imm16, reg
23 # ORW imm4/imm16, reg
xor_test.s 5 # XORB imm4/imm16, reg
23 # XORW imm4/imm16, reg
storb_test.s 115 # storb imm4, rbase(disp)
storw_test.s 115 # storw imm4, rbase(disp)
  /toolchain/binutils/binutils-2.25/gas/doc/
c-z8k.texi 286 bit @@rd,imm4 cpb rbd,rbs ex rd,addr(rs)
287 bit addr(rd),imm4 cpd rd,@@rs,rr,cc ex rd,rs
288 bit addr,imm4 cpdb rbd,@@rs,rr,cc exb rbd,@@rs
289 bit rd,imm4 cpdr rd,@@rs,rr,cc exb rbd,addr
291 bitb @@rd,imm4 cpi rd,@@rs,rr,cc exb rbd,rbs
292 bitb addr(rd),imm4 cpib rbd,@@rs,rr,cc ext0e imm8
293 bitb addr,imm4 cpir rd,@@rs,rr,cc ext0f imm8
294 bitb rbd,imm4 cpirb rbd,@@rs,rr,cc ext8e imm8
319 jp cc,addr(rd) ldk rd,imm4 negb addr
353 push @@rd,rs set addr,imm4 subl rrd,imm3
    [all...]
  /toolchain/binutils/binutils-2.25/opcodes/
xstormy16-opc.c 499 /* add $Rd,#$imm4 */
502 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
523 /* adc $Rd,#$imm4 */
526 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
547 /* sub $Rd,#$imm4 */
550 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
571 /* sbc $Rd,#$imm4 */
574 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
607 /* rrc $Rd,#$imm4 */
610 { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } }
    [all...]
h8500-opc.h 140 #define IMM4 34
229 {12,'-','I','!','!',O_TRAPA|O_UNSZ,"trapa",1,{IMM4,0},2, {{0x08,0xff,0 },{0x10,0xf0,IMM4 }}},
    [all...]
z8kgen.c 116 {"-Z----", 8, 16, "0010 0111 ddN0 imm4", "bit @rd,imm4", 0},
117 {"-Z----", 11, 16, "0110 0111 ddN0 imm4 address_dst", "bit address_dst(rd),imm4", 0},
118 {"-Z----", 10, 16, "0110 0111 0000 imm4 address_dst", "bit address_dst,imm4", 0},
119 {"-Z----", 4, 16, "1010 0111 dddd imm4", "bit rd,imm4", 0},
122 {"-Z----", 8, 8, "0010 0110 ddN0 imm4", "bitb @rd,imm4", 0}
    [all...]
z8k-opc.h 519 /* 0010 0111 ddN0 imm4 *** bit @rd,imm4 */
522 "bit @rd,imm4",16,8,0x10,
527 /* 0110 0111 ddN0 imm4 address_dst *** bit address_dst(rd),imm4 */
530 "bit address_dst(rd),imm4",16,11,0x10,
535 /* 0110 0111 0000 imm4 address_dst *** bit address_dst,imm4 */
538 "bit address_dst,imm4",16,10,0x10,
543 /* 1010 0111 dddd imm4 *** bit rd,imm4 *
    [all...]
xstormy16-desc.c 280 { XSTORMY16_F_IMM4, "f-imm4", 0, 32, 8, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
401 /* imm4: 4 bit unsigned immediate */
402 { "imm4", XSTORMY16_OPERAND_IMM4, HW_H_UINT, 8, 4,
767 /* add $Rd,#$imm4 */
787 /* adc $Rd,#$imm4 */
807 /* sub $Rd,#$imm4 */
827 /* sbc $Rd,#$imm4 */
857 /* rrc $Rd,#$imm4 */
867 /* rlc $Rd,#$imm4 */
877 /* shr $Rd,#$imm4 */
    [all...]
h8500-dis.c 172 case IMM4:
311 case IMM4:
cr16-opc.c 30 /* opc8 imm4 r */ \
98 /* opc8 imm4 rp */ \
146 SHIFT_INST_A("ashub", 0x80, 0x41, 23, imm4, regr),
156 SHIFT_INST_L("lshb", 0x13, 0x44, 23, imm4, regr),
557 {4, arg_ic, OP_SIGNED}, /* imm4 */
  /toolchain/binutils/binutils-2.25/cpu/
xstormy16.cpu 285 (dnf f-imm4 "4 bit unsigned" () 8 4)
287 (name imm4)
291 (index f-imm4)
1201 ("add $Rd,#$imm4")
1202 (+ OP1_5 OP2_1 imm4 Rd)
1203 (set-psw-add Rd (index-of Rd) Rd imm4 0)
1237 ("adc $Rd,#$imm4")
1238 (+ OP1_5 OP2_3 imm4 Rd)
1239 (set-psw-add Rd (index-of Rd) Rd imm4 psw-cy)
    [all...]
ChangeLog 250 (arith-jnz-imm4-dst-defn): Make relaxable.
251 (arith-jnz16-imm4-dst-defn): Fix encodings.
316 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
416 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
417 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
  /toolchain/binutils/binutils-2.25/include/opcode/
h8300.h 122 IMM4 = IMM | L_4,
134 IMM4_NS = IMM4 | NO_SYMBOLS,
    [all...]
  /art/compiler/linker/arm/
relative_patcher_thumb2.cc 71 uint32_t imm4 = (diff16 >> 12) & 0xfu; local
75 insn = (insn & 0xfbf08f00u) | (imm << 26) | (imm4 << 16) | (imm3 << 12) | imm8;
  /external/llvm/lib/Target/Mips/
Mips16InstrFormats.td 271 // Format RRI-A instruction class in Mips : <|opcode|rx|ry|f|imm4|>
281 bits<4> imm4;
289 let Inst{3-0} = imm4;
429 // <|EXTEND|imm10:5|imm15:11|op|0|0|0|0|0|0|imm4:0>
480 // <|EXTEND|imm10:5|imm15:11|op|rx|0|0|0|imm4:0>
504 // <|EXTEND|imm10:5|imm15:11|op|rx|ry|imm4:0>
582 // <|EXTEND|imm10:5|imm15:11|I8|funct|0|imm4:0>
  /external/valgrind/VEX/priv/
host_arm_isel.c 3325 UInt imm4; local
3344 UInt imm4; local
3363 UInt imm4; local
3730 UInt imm4; local
3958 UInt imm4; local
3977 UInt imm4; local
3996 UInt imm4; local
5314 UInt imm4; local
    [all...]

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