1 @c Copyright (C) 1991-2014 Free Software Foundation, Inc. 2 @c This is part of the GAS manual. 3 @c For copying conditions, see the file as.texinfo. 4 @ifset GENERIC 5 @page 6 @node Z8000-Dependent 7 @chapter Z8000 Dependent Features 8 @end ifset 9 @ifclear GENERIC 10 @node Machine Dependencies 11 @chapter Z8000 Dependent Features 12 @end ifclear 13 14 @cindex Z8000 support 15 The Z8000 @value{AS} supports both members of the Z8000 family: the 16 unsegmented Z8002, with 16 bit addresses, and the segmented Z8001 with 17 24 bit addresses. 18 19 When the assembler is in unsegmented mode (specified with the 20 @code{unsegm} directive), an address takes up one word (16 bit) 21 sized register. When the assembler is in segmented mode (specified with 22 the @code{segm} directive), a 24-bit address takes up a long (32 bit) 23 register. @xref{Z8000 Directives,,Assembler Directives for the Z8000}, 24 for a list of other Z8000 specific assembler directives. 25 26 @menu 27 * Z8000 Options:: Command-line options for the Z8000 28 * Z8000 Syntax:: Assembler syntax for the Z8000 29 * Z8000 Directives:: Special directives for the Z8000 30 * Z8000 Opcodes:: Opcodes 31 @end menu 32 33 @node Z8000 Options 34 @section Options 35 36 @cindex Z8000 options 37 @cindex options, Z8000 38 @table @option 39 @cindex @code{-z8001} command line option, Z8000 40 @item -z8001 41 Generate segmented code by default. 42 43 @cindex @code{-z8002} command line option, Z8000 44 @item -z8002 45 Generate unsegmented code by default. 46 @end table 47 48 @node Z8000 Syntax 49 @section Syntax 50 @menu 51 * Z8000-Chars:: Special Characters 52 * Z8000-Regs:: Register Names 53 * Z8000-Addressing:: Addressing Modes 54 @end menu 55 56 @node Z8000-Chars 57 @subsection Special Characters 58 59 @cindex line comment character, Z8000 60 @cindex Z8000 line comment character 61 @samp{!} is the line comment character. 62 63 If a @samp{#} appears as the first character of a line then the whole 64 line is treated as a comment, but in this case the line could also be 65 a logical line number directive (@pxref{Comments}) or a preprocessor 66 control command (@pxref{Preprocessing}). 67 68 @cindex line separator, Z8000 69 @cindex statement separator, Z8000 70 @cindex Z8000 line separator 71 You can use @samp{;} instead of a newline to separate statements. 72 73 @node Z8000-Regs 74 @subsection Register Names 75 76 @cindex Z8000 registers 77 @cindex registers, Z8000 78 The Z8000 has sixteen 16 bit registers, numbered 0 to 15. You can refer 79 to different sized groups of registers by register number, with the 80 prefix @samp{r} for 16 bit registers, @samp{rr} for 32 bit registers and 81 @samp{rq} for 64 bit registers. You can also refer to the contents of 82 the first eight (of the sixteen 16 bit registers) by bytes. They are 83 named @samp{rl@var{n}} and @samp{rh@var{n}}. 84 85 @smallexample 86 @exdent @emph{byte registers} 87 rl0 rh0 rl1 rh1 rl2 rh2 rl3 rh3 88 rl4 rh4 rl5 rh5 rl6 rh6 rl7 rh7 89 90 @exdent @emph{word registers} 91 r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 92 93 @exdent @emph{long word registers} 94 rr0 rr2 rr4 rr6 rr8 rr10 rr12 rr14 95 96 @exdent @emph{quad word registers} 97 rq0 rq4 rq8 rq12 98 @end smallexample 99 100 @node Z8000-Addressing 101 @subsection Addressing Modes 102 103 @cindex addressing modes, Z8000 104 @cindex Z800 addressing modes 105 @value{AS} understands the following addressing modes for the Z8000: 106 107 @table @code 108 @item rl@var{n} 109 @itemx rh@var{n} 110 @itemx r@var{n} 111 @itemx rr@var{n} 112 @itemx rq@var{n} 113 Register direct: 8bit, 16bit, 32bit, and 64bit registers. 114 115 @item @@r@var{n} 116 @itemx @@rr@var{n} 117 Indirect register: @@rr@var{n} in segmented mode, @@r@var{n} in unsegmented 118 mode. 119 120 @item @var{addr} 121 Direct: the 16 bit or 24 bit address (depending on whether the assembler 122 is in segmented or unsegmented mode) of the operand is in the instruction. 123 124 @item address(r@var{n}) 125 Indexed: the 16 or 24 bit address is added to the 16 bit register to produce 126 the final address in memory of the operand. 127 128 @item r@var{n}(#@var{imm}) 129 @itemx rr@var{n}(#@var{imm}) 130 Base Address: the 16 or 24 bit register is added to the 16 bit sign 131 extended immediate displacement to produce the final address in memory 132 of the operand. 133 134 @item r@var{n}(r@var{m}) 135 @itemx rr@var{n}(r@var{m}) 136 Base Index: the 16 or 24 bit register r@var{n} or rr@var{n} is added to 137 the sign extended 16 bit index register r@var{m} to produce the final 138 address in memory of the operand. 139 140 @item #@var{xx} 141 Immediate data @var{xx}. 142 @end table 143 144 @node Z8000 Directives 145 @section Assembler Directives for the Z8000 146 147 @cindex Z8000 directives 148 @cindex directives, Z8000 149 The Z8000 port of @value{AS} includes additional assembler directives, 150 for compatibility with other Z8000 assemblers. These do not begin with 151 @samp{.} (unlike the ordinary @value{AS} directives). 152 153 @table @code 154 @kindex segm 155 @item segm 156 @kindex .z8001 157 @itemx .z8001 158 Generate code for the segmented Z8001. 159 160 @kindex unsegm 161 @item unsegm 162 @kindex .z8002 163 @itemx .z8002 164 Generate code for the unsegmented Z8002. 165 166 @kindex name 167 @item name 168 Synonym for @code{.file} 169 170 @kindex global 171 @item global 172 Synonym for @code{.global} 173 174 @kindex wval 175 @item wval 176 Synonym for @code{.word} 177 178 @kindex lval 179 @item lval 180 Synonym for @code{.long} 181 182 @kindex bval 183 @item bval 184 Synonym for @code{.byte} 185 186 @kindex sval 187 @item sval 188 Assemble a string. @code{sval} expects one string literal, delimited by 189 single quotes. It assembles each byte of the string into consecutive 190 addresses. You can use the escape sequence @samp{%@var{xx}} (where 191 @var{xx} represents a two-digit hexadecimal number) to represent the 192 character whose @sc{ascii} value is @var{xx}. Use this feature to 193 describe single quote and other characters that may not appear in string 194 literals as themselves. For example, the C statement @w{@samp{char *a = 195 "he said \"it's 50% off\"";}} is represented in Z8000 assembly language 196 (shown with the assembler output in hex at the left) as 197 198 @iftex 199 @begingroup 200 @let@nonarrowing=@comment 201 @end iftex 202 @smallexample 203 68652073 sval 'he said %22it%27s 50%25 off%22%00' 204 61696420 205 22697427 206 73203530 207 25206F66 208 662200 209 @end smallexample 210 @iftex 211 @endgroup 212 @end iftex 213 214 @kindex rsect 215 @item rsect 216 synonym for @code{.section} 217 218 @kindex block 219 @item block 220 synonym for @code{.space} 221 222 @kindex even 223 @item even 224 special case of @code{.align}; aligns output to even byte boundary. 225 @end table 226 227 @node Z8000 Opcodes 228 @section Opcodes 229 230 @cindex Z8000 opcode summary 231 @cindex opcode summary, Z8000 232 @cindex mnemonics, Z8000 233 @cindex instruction summary, Z8000 234 For detailed information on the Z8000 machine instruction set, see 235 @cite{Z8000 Technical Manual}. 236 237 @ifset SMALL 238 @c this table, due to the multi-col faking and hardcoded order, looks silly 239 @c except in smallbook. See comments below "@set SMALL" near top of this file. 240 241 The following table summarizes the opcodes and their arguments: 242 @iftex 243 @begingroup 244 @let@nonarrowing=@comment 245 @end iftex 246 @smallexample 247 248 rs @r{16 bit source register} 249 rd @r{16 bit destination register} 250 rbs @r{8 bit source register} 251 rbd @r{8 bit destination register} 252 rrs @r{32 bit source register} 253 rrd @r{32 bit destination register} 254 rqs @r{64 bit source register} 255 rqd @r{64 bit destination register} 256 addr @r{16/24 bit address} 257 imm @r{immediate data} 258 259 adc rd,rs clrb addr cpsir @@rd,@@rs,rr,cc 260 adcb rbd,rbs clrb addr(rd) cpsirb @@rd,@@rs,rr,cc 261 add rd,@@rs clrb rbd dab rbd 262 add rd,addr com @@rd dbjnz rbd,disp7 263 add rd,addr(rs) com addr dec @@rd,imm4m1 264 add rd,imm16 com addr(rd) dec addr(rd),imm4m1 265 add rd,rs com rd dec addr,imm4m1 266 addb rbd,@@rs comb @@rd dec rd,imm4m1 267 addb rbd,addr comb addr decb @@rd,imm4m1 268 addb rbd,addr(rs) comb addr(rd) decb addr(rd),imm4m1 269 addb rbd,imm8 comb rbd decb addr,imm4m1 270 addb rbd,rbs comflg flags decb rbd,imm4m1 271 addl rrd,@@rs cp @@rd,imm16 di i2 272 addl rrd,addr cp addr(rd),imm16 div rrd,@@rs 273 addl rrd,addr(rs) cp addr,imm16 div rrd,addr 274 addl rrd,imm32 cp rd,@@rs div rrd,addr(rs) 275 addl rrd,rrs cp rd,addr div rrd,imm16 276 and rd,@@rs cp rd,addr(rs) div rrd,rs 277 and rd,addr cp rd,imm16 divl rqd,@@rs 278 and rd,addr(rs) cp rd,rs divl rqd,addr 279 and rd,imm16 cpb @@rd,imm8 divl rqd,addr(rs) 280 and rd,rs cpb addr(rd),imm8 divl rqd,imm32 281 andb rbd,@@rs cpb addr,imm8 divl rqd,rrs 282 andb rbd,addr cpb rbd,@@rs djnz rd,disp7 283 andb rbd,addr(rs) cpb rbd,addr ei i2 284 andb rbd,imm8 cpb rbd,addr(rs) ex rd,@@rs 285 andb rbd,rbs cpb rbd,imm8 ex rd,addr 286 bit @@rd,imm4 cpb rbd,rbs ex rd,addr(rs) 287 bit addr(rd),imm4 cpd rd,@@rs,rr,cc ex rd,rs 288 bit addr,imm4 cpdb rbd,@@rs,rr,cc exb rbd,@@rs 289 bit rd,imm4 cpdr rd,@@rs,rr,cc exb rbd,addr 290 bit rd,rs cpdrb rbd,@@rs,rr,cc exb rbd,addr(rs) 291 bitb @@rd,imm4 cpi rd,@@rs,rr,cc exb rbd,rbs 292 bitb addr(rd),imm4 cpib rbd,@@rs,rr,cc ext0e imm8 293 bitb addr,imm4 cpir rd,@@rs,rr,cc ext0f imm8 294 bitb rbd,imm4 cpirb rbd,@@rs,rr,cc ext8e imm8 295 bitb rbd,rs cpl rrd,@@rs ext8f imm8 296 bpt cpl rrd,addr exts rrd 297 call @@rd cpl rrd,addr(rs) extsb rd 298 call addr cpl rrd,imm32 extsl rqd 299 call addr(rd) cpl rrd,rrs halt 300 calr disp12 cpsd @@rd,@@rs,rr,cc in rd,@@rs 301 clr @@rd cpsdb @@rd,@@rs,rr,cc in rd,imm16 302 clr addr cpsdr @@rd,@@rs,rr,cc inb rbd,@@rs 303 clr addr(rd) cpsdrb @@rd,@@rs,rr,cc inb rbd,imm16 304 clr rd cpsi @@rd,@@rs,rr,cc inc @@rd,imm4m1 305 clrb @@rd cpsib @@rd,@@rs,rr,cc inc addr(rd),imm4m1 306 inc addr,imm4m1 ldb rbd,rs(rx) mult rrd,addr(rs) 307 inc rd,imm4m1 ldb rd(imm16),rbs mult rrd,imm16 308 incb @@rd,imm4m1 ldb rd(rx),rbs mult rrd,rs 309 incb addr(rd),imm4m1 ldctl ctrl,rs multl rqd,@@rs 310 incb addr,imm4m1 ldctl rd,ctrl multl rqd,addr 311 incb rbd,imm4m1 ldd @@rs,@@rd,rr multl rqd,addr(rs) 312 ind @@rd,@@rs,ra lddb @@rs,@@rd,rr multl rqd,imm32 313 indb @@rd,@@rs,rba lddr @@rs,@@rd,rr multl rqd,rrs 314 inib @@rd,@@rs,ra lddrb @@rs,@@rd,rr neg @@rd 315 inibr @@rd,@@rs,ra ldi @@rd,@@rs,rr neg addr 316 iret ldib @@rd,@@rs,rr neg addr(rd) 317 jp cc,@@rd ldir @@rd,@@rs,rr neg rd 318 jp cc,addr ldirb @@rd,@@rs,rr negb @@rd 319 jp cc,addr(rd) ldk rd,imm4 negb addr 320 jr cc,disp8 ldl @@rd,rrs negb addr(rd) 321 ld @@rd,imm16 ldl addr(rd),rrs negb rbd 322 ld @@rd,rs ldl addr,rrs nop 323 ld addr(rd),imm16 ldl rd(imm16),rrs or rd,@@rs 324 ld addr(rd),rs ldl rd(rx),rrs or rd,addr 325 ld addr,imm16 ldl rrd,@@rs or rd,addr(rs) 326 ld addr,rs ldl rrd,addr or rd,imm16 327 ld rd(imm16),rs ldl rrd,addr(rs) or rd,rs 328 ld rd(rx),rs ldl rrd,imm32 orb rbd,@@rs 329 ld rd,@@rs ldl rrd,rrs orb rbd,addr 330 ld rd,addr ldl rrd,rs(imm16) orb rbd,addr(rs) 331 ld rd,addr(rs) ldl rrd,rs(rx) orb rbd,imm8 332 ld rd,imm16 ldm @@rd,rs,n orb rbd,rbs 333 ld rd,rs ldm addr(rd),rs,n out @@rd,rs 334 ld rd,rs(imm16) ldm addr,rs,n out imm16,rs 335 ld rd,rs(rx) ldm rd,@@rs,n outb @@rd,rbs 336 lda rd,addr ldm rd,addr(rs),n outb imm16,rbs 337 lda rd,addr(rs) ldm rd,addr,n outd @@rd,@@rs,ra 338 lda rd,rs(imm16) ldps @@rs outdb @@rd,@@rs,rba 339 lda rd,rs(rx) ldps addr outib @@rd,@@rs,ra 340 ldar rd,disp16 ldps addr(rs) outibr @@rd,@@rs,ra 341 ldb @@rd,imm8 ldr disp16,rs pop @@rd,@@rs 342 ldb @@rd,rbs ldr rd,disp16 pop addr(rd),@@rs 343 ldb addr(rd),imm8 ldrb disp16,rbs pop addr,@@rs 344 ldb addr(rd),rbs ldrb rbd,disp16 pop rd,@@rs 345 ldb addr,imm8 ldrl disp16,rrs popl @@rd,@@rs 346 ldb addr,rbs ldrl rrd,disp16 popl addr(rd),@@rs 347 ldb rbd,@@rs mbit popl addr,@@rs 348 ldb rbd,addr mreq rd popl rrd,@@rs 349 ldb rbd,addr(rs) mres push @@rd,@@rs 350 ldb rbd,imm8 mset push @@rd,addr 351 ldb rbd,rbs mult rrd,@@rs push @@rd,addr(rs) 352 ldb rbd,rs(imm16) mult rrd,addr push @@rd,imm16 353 push @@rd,rs set addr,imm4 subl rrd,imm32 354 pushl @@rd,@@rs set rd,imm4 subl rrd,rrs 355 pushl @@rd,addr set rd,rs tcc cc,rd 356 pushl @@rd,addr(rs) setb @@rd,imm4 tccb cc,rbd 357 pushl @@rd,rrs setb addr(rd),imm4 test @@rd 358 res @@rd,imm4 setb addr,imm4 test addr 359 res addr(rd),imm4 setb rbd,imm4 test addr(rd) 360 res addr,imm4 setb rbd,rs test rd 361 res rd,imm4 setflg imm4 testb @@rd 362 res rd,rs sinb rbd,imm16 testb addr 363 resb @@rd,imm4 sinb rd,imm16 testb addr(rd) 364 resb addr(rd),imm4 sind @@rd,@@rs,ra testb rbd 365 resb addr,imm4 sindb @@rd,@@rs,rba testl @@rd 366 resb rbd,imm4 sinib @@rd,@@rs,ra testl addr 367 resb rbd,rs sinibr @@rd,@@rs,ra testl addr(rd) 368 resflg imm4 sla rd,imm8 testl rrd 369 ret cc slab rbd,imm8 trdb @@rd,@@rs,rba 370 rl rd,imm1or2 slal rrd,imm8 trdrb @@rd,@@rs,rba 371 rlb rbd,imm1or2 sll rd,imm8 trib @@rd,@@rs,rbr 372 rlc rd,imm1or2 sllb rbd,imm8 trirb @@rd,@@rs,rbr 373 rlcb rbd,imm1or2 slll rrd,imm8 trtdrb @@ra,@@rb,rbr 374 rldb rbb,rba sout imm16,rs trtib @@ra,@@rb,rr 375 rr rd,imm1or2 soutb imm16,rbs trtirb @@ra,@@rb,rbr 376 rrb rbd,imm1or2 soutd @@rd,@@rs,ra trtrb @@ra,@@rb,rbr 377 rrc rd,imm1or2 soutdb @@rd,@@rs,rba tset @@rd 378 rrcb rbd,imm1or2 soutib @@rd,@@rs,ra tset addr 379 rrdb rbb,rba soutibr @@rd,@@rs,ra tset addr(rd) 380 rsvd36 sra rd,imm8 tset rd 381 rsvd38 srab rbd,imm8 tsetb @@rd 382 rsvd78 sral rrd,imm8 tsetb addr 383 rsvd7e srl rd,imm8 tsetb addr(rd) 384 rsvd9d srlb rbd,imm8 tsetb rbd 385 rsvd9f srll rrd,imm8 xor rd,@@rs 386 rsvdb9 sub rd,@@rs xor rd,addr 387 rsvdbf sub rd,addr xor rd,addr(rs) 388 sbc rd,rs sub rd,addr(rs) xor rd,imm16 389 sbcb rbd,rbs sub rd,imm16 xor rd,rs 390 sc imm8 sub rd,rs xorb rbd,@@rs 391 sda rd,rs subb rbd,@@rs xorb rbd,addr 392 sdab rbd,rs subb rbd,addr xorb rbd,addr(rs) 393 sdal rrd,rs subb rbd,addr(rs) xorb rbd,imm8 394 sdl rd,rs subb rbd,imm8 xorb rbd,rbs 395 sdlb rbd,rs subb rbd,rbs xorb rbd,rbs 396 sdll rrd,rs subl rrd,@@rs 397 set @@rd,imm4 subl rrd,addr 398 set addr(rd),imm4 subl rrd,addr(rs) 399 @end smallexample 400 @iftex 401 @endgroup 402 @end iftex 403 @end ifset 404 405
