| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| elf_arch_mips32r5.d | 1 # name: ELF MIPS32r5 markings
4 # as: -32 -march=mips32r5
11 ISA: MIPS32r5
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| r5.d | 2 #name: Test MIPS32r5 instructions
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| elf_arch_mips32r6.d | 1 # name: ELF MIPS32r5 markings
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| /external/llvm/test/MC/Mips/mips32r5/ |
| invalid-mips64r2.s | 4 # RUN: -mcpu=mips32r5 2>%t1
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| abiflags.s | 1 # RUN: llvm-mc %s -arch=mips -mcpu=mips32r5 | \
4 # RUN: llvm-mc %s -arch=mips -mcpu=mips32r5 -filetype=obj -o - | \
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| invalid.s | 4 # RUN: not llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r5 2>%t1
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| /external/llvm/test/MC/Mips/ |
| set-mips-directives.s | 24 .set mips32r5
60 # CHECK: .set mips32r5
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| rotations32-bad.s | 7 # RUN: not llvm-mc %s -arch=mips -mcpu=mips32r5 -show-encoding 2> %t1
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| set-arch.s | 23 .set arch=mips32r5
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| set-mips-directives-bad.s | 28 .set mips32r5
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| elf_eflags.s | 34 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32r5 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS32R2 %s
39 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32r5 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS32R2-NAN2008 %s
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| /external/llvm/test/MC/Disassembler/Mips/mips32r5/ |
| invalid-xfail.txt | 1 # RUN: llvm-mc %s -triple=mips-unknown-linux -disassemble -mcpu=mips32r5 | FileCheck %s
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| valid-xfail.txt | 1 # RUN: llvm-mc %s -triple=mips-unknown-linux -disassemble -mcpu=mips32r5 | FileCheck %s
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| /external/llvm/test/MC/Mips/eva/ |
| invalid-noeva.s | 7 # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips32r5 2>%t1
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| /external/llvm/lib/Target/Mips/ |
| Mips.td | 125 def FeatureMips32r5 : SubtargetFeature<"mips32r5", "MipsArchVersion",
126 "Mips32r5", "Mips32r5 ISA Support",
193 def : Proc<"mips32r5", [FeatureMips32r5]>;
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| MipsSubtarget.h | 41 Mips1, Mips2, Mips32, Mips32r2, Mips32r3, Mips32r5, Mips32r6, Mips32Max,
203 return (MipsArchVersion >= Mips32r5 && MipsArchVersion < Mips32Max) ||
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| /external/llvm/test/CodeGen/Mips/ |
| check-adde-redundant-moves.ll | 9 ; RUN: llc < %s -march=mips -mcpu=mips32r5 | FileCheck %s \
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| /external/llvm/test/CodeGen/Mips/llvm-ir/ |
| indirectbr.ll | 6 ; RUN: llc -march=mips -mcpu=mips32r5 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check-prefix=NOT-R6
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| and.ll | 9 ; RUN: llc < %s -march=mips -mcpu=mips32r5 | FileCheck %s \
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| or.ll | 9 ; RUN: llc < %s -march=mips -mcpu=mips32r5 | FileCheck %s \
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| udiv.ll | 9 ; RUN: llc < %s -march=mips -mcpu=mips32r5 | FileCheck %s \
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| xor.ll | 9 ; RUN: llc < %s -march=mips -mcpu=mips32r5 | FileCheck %s \
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| /art/runtime/arch/mips/ |
| asm_support_mips.S | 70 /* mips32r5 & mips32r6 have mthc1 op, and have 64-bit fp regs,
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsABIInfo.cpp | 79 .Case("mips32r5", MipsABIInfo::O32())
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| /external/llvm/test/MC/Disassembler/Mips/eva/ |
| valid_preR6-eva.txt | 3 # RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips32r5 -mattr=eva | FileCheck %s
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