1 ; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \ 2 ; RUN: -check-prefix=ALL -check-prefix=GP32 3 ; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \ 4 ; RUN: -check-prefix=ALL -check-prefix=GP32 5 ; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \ 6 ; RUN: -check-prefix=ALL -check-prefix=GP32 7 ; RUN: llc < %s -march=mips -mcpu=mips32r3 | FileCheck %s \ 8 ; RUN: -check-prefix=ALL -check-prefix=GP32 9 ; RUN: llc < %s -march=mips -mcpu=mips32r5 | FileCheck %s \ 10 ; RUN: -check-prefix=ALL -check-prefix=GP32 11 ; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \ 12 ; RUN: -check-prefix=ALL -check-prefix=GP32 13 ; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \ 14 ; RUN: -check-prefix=ALL -check-prefix=GP64 15 ; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \ 16 ; RUN: -check-prefix=ALL -check-prefix=GP64 17 ; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \ 18 ; RUN: -check-prefix=ALL -check-prefix=GP64 19 ; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \ 20 ; RUN: -check-prefix=ALL -check-prefix=GP64 21 ; RUN: llc < %s -march=mips64 -mcpu=mips64r3 | FileCheck %s \ 22 ; RUN: -check-prefix=ALL -check-prefix=GP64 23 ; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s \ 24 ; RUN: -check-prefix=ALL -check-prefix=GP64 25 ; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \ 26 ; RUN: -check-prefix=ALL -check-prefix=GP64 27 28 define signext i1 @and_i1(i1 signext %a, i1 signext %b) { 29 entry: 30 ; ALL-LABEL: and_i1: 31 32 ; ALL: and $2, $4, $5 33 34 %r = and i1 %a, %b 35 ret i1 %r 36 } 37 38 define signext i8 @and_i8(i8 signext %a, i8 signext %b) { 39 entry: 40 ; ALL-LABEL: and_i8: 41 42 ; ALL: and $2, $4, $5 43 44 %r = and i8 %a, %b 45 ret i8 %r 46 } 47 48 define signext i16 @and_i16(i16 signext %a, i16 signext %b) { 49 entry: 50 ; ALL-LABEL: and_i16: 51 52 ; ALL: and $2, $4, $5 53 54 %r = and i16 %a, %b 55 ret i16 %r 56 } 57 58 define signext i32 @and_i32(i32 signext %a, i32 signext %b) { 59 entry: 60 ; ALL-LABEL: and_i32: 61 62 ; GP32: and $2, $4, $5 63 64 ; GP64: and $[[T0:[0-9]+]], $4, $5 65 ; GP64: sll $2, $[[T0]], 0 66 67 %r = and i32 %a, %b 68 ret i32 %r 69 } 70 71 define signext i64 @and_i64(i64 signext %a, i64 signext %b) { 72 entry: 73 ; ALL-LABEL: and_i64: 74 75 ; GP32: and $2, $4, $6 76 ; GP32: and $3, $5, $7 77 78 ; GP64: and $2, $4, $5 79 80 %r = and i64 %a, %b 81 ret i64 %r 82 } 83 84 define signext i128 @and_i128(i128 signext %a, i128 signext %b) { 85 entry: 86 ; ALL-LABEL: and_i128: 87 88 ; GP32: lw $[[T0:[0-9]+]], 24($sp) 89 ; GP32: lw $[[T1:[0-9]+]], 20($sp) 90 ; GP32: lw $[[T2:[0-9]+]], 16($sp) 91 ; GP32: and $2, $4, $[[T2]] 92 ; GP32: and $3, $5, $[[T1]] 93 ; GP32: and $4, $6, $[[T0]] 94 ; GP32: lw $[[T3:[0-9]+]], 28($sp) 95 ; GP32: and $5, $7, $[[T3]] 96 97 ; GP64: and $2, $4, $6 98 ; GP64: and $3, $5, $7 99 100 %r = and i128 %a, %b 101 ret i128 %r 102 } 103
