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  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/
elf_arch_mips64r3.d 1 # name: ELF MIPS64r3 markings
4 # as: -32 -march=mips64r3
11 ISA: MIPS64r3
  /external/llvm/test/MC/Mips/mips64r3/
abi-bad.s 1 # RUN: not llvm-mc %s -triple mips-unknown-linux -mcpu=mips64r3 2>&1 | FileCheck %s
abiflags.s 1 # RUN: llvm-mc %s -arch=mips -mcpu=mips64r3 | \
4 # RUN: llvm-mc %s -arch=mips -mcpu=mips64r3 -filetype=obj -o - | \
invalid.s 4 # RUN: not llvm-mc %s -triple=mips64-unknown-linux -mcpu=mips64r3 2>%t1
  /external/llvm/test/MC/Mips/mips64r5/
invalid-mips64r3.s 3 # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips64r3 \
  /external/llvm/test/MC/Mips/
set-mips-directives-bad.s 24 .set mips64r3
27 .set mips64r3
37 .set mips64r3
set-mips-directives.s 33 .set mips64r3
69 # CHECK: .set mips64r3
set-arch.s 32 .set arch=mips64r3
elf_eflags.s 11 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r3 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2 %s
16 # RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r3 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-NAN2008 %s
  /external/llvm/test/MC/Disassembler/Mips/mips64r3/
invalid-xfail.txt 1 # RUN: llvm-mc %s -triple=mips64-unknown-linux -disassemble -mcpu=mips64r3 | FileCheck %s
valid-xfail.txt 1 # RUN: llvm-mc %s -triple=mips64-unknown-linux -disassemble -mcpu=mips64r3 | FileCheck %s
  /external/llvm/test/CodeGen/Mips/Fast-ISel/
check-disabled-mcpus.ll 15 ; RUN: llc -march=mips -mcpu=mips64r3 -O0 -relocation-model=pic \
  /external/llvm/test/MC/Mips/eva/
invalid-noeva.s 13 # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r3 2>%t1
  /external/llvm/lib/Target/Mips/
Mips.td 139 def FeatureMips64r3 : SubtargetFeature<"mips64r3", "MipsArchVersion",
140 "Mips64r3", "Mips64r3 ISA Support",
201 def : Proc<"mips64r3", [FeatureMips64r3]>;
MipsSubtarget.h 42 Mips3, Mips4, Mips5, Mips64, Mips64r2, Mips64r3, Mips64r5, Mips64r6
212 bool hasMips64r3() const { return MipsArchVersion >= Mips64r3; }
  /external/llvm/test/CodeGen/Mips/
check-adde-redundant-moves.ll 17 ; RUN: llc < %s -march=mips64 -mcpu=mips64r3 | FileCheck %s -check-prefix=ALL
  /external/llvm/test/CodeGen/Mips/llvm-ir/
indirectbr.ll 11 ; RUN: llc -march=mips64 -mcpu=mips64r3 -asm-show-inst < %s | FileCheck %s -check-prefix=ALL -check-prefix=NOT-R6
and.ll 21 ; RUN: llc < %s -march=mips64 -mcpu=mips64r3 | FileCheck %s \
or.ll 21 ; RUN: llc < %s -march=mips64 -mcpu=mips64r3 | FileCheck %s \
udiv.ll 21 ; RUN: llc < %s -march=mips64 -mcpu=mips64r3 | FileCheck %s \
xor.ll 21 ; RUN: llc < %s -march=mips64 -mcpu=mips64r3 | FileCheck %s \
add.ll 21 ; RUN: llc < %s -march=mips64 -mcpu=mips64r3 | FileCheck %s \
call.ll 13 ; RUN: llc -march=mips64 -mcpu=mips64r3 -enable-mips-tail-calls < %s | FileCheck %s -check-prefix=ALL -check-prefix=N64
  /external/llvm/lib/Target/Mips/MCTargetDesc/
MipsABIInfo.cpp 86 .Case("mips64r3", MipsABIInfo::N64())
  /external/llvm/test/MC/Disassembler/Mips/eva/
valid_preR6-eva.txt 5 # RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips64r3 -mattr=eva | FileCheck %s

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