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  /external/llvm/lib/Target/Mips/
MipsMachineFunction.cpp 51 return GlobalBaseReg = MF.getRegInfo().createVirtualRegister(RC);
63 return Mips16SPAliasReg = MF.getRegInfo().createVirtualRegister(RC);
Mips16ISelDAGToDAG.cpp 80 V0 = RegInfo.createVirtualRegister(RC);
81 V1 = RegInfo.createVirtualRegister(RC);
82 V2 = RegInfo.createVirtualRegister(RC);
MipsISelLowering.cpp     [all...]
MipsSEFrameLowering.cpp 157 unsigned VR = MRI.createVirtualRegister(RC);
172 unsigned VR = MRI.createVirtualRegister(RC);
190 unsigned VR0 = MRI.createVirtualRegister(RC);
191 unsigned VR1 = MRI.createVirtualRegister(RC);
215 unsigned VR0 = MRI.createVirtualRegister(RC);
216 unsigned VR1 = MRI.createVirtualRegister(RC);
247 unsigned VR0 = MRI.createVirtualRegister(RC);
248 unsigned VR1 = MRI.createVirtualRegister(RC);
518 unsigned VR = MF.getRegInfo().createVirtualRegister(RC);
    [all...]
MipsSEISelLowering.cpp     [all...]
  /external/llvm/lib/Target/AMDGPU/
SIInstrInfo.cpp     [all...]
  /external/llvm/lib/Target/PowerPC/
PPCRegisterInfo.cpp 356 unsigned Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC);
380 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC);
388 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC);
405 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC);
413 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC);
477 unsigned Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC);
489 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC);
522 unsigned Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC);
534 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC);
565 unsigned Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC)
    [all...]
PPCVSXCopy.cpp 116 unsigned NewVReg = MRI.createVirtualRegister(SrcRC);
142 unsigned NewVReg = MRI.createVirtualRegister(DstRC);
  /external/llvm/lib/Target/WebAssembly/
WebAssemblyFrameLowering.cpp 74 unsigned SPReg = MRI.createVirtualRegister(&WebAssembly::I32RegClass);
89 unsigned OffsetReg = MRI.createVirtualRegister(&WebAssembly::I32RegClass);
150 unsigned OffsetReg = MRI.createVirtualRegister(&WebAssembly::I32RegClass);
WebAssemblyLowerBrUnless.cpp 109 unsigned ZeroReg = MRI.createVirtualRegister(&WebAssembly::I32RegClass);
113 unsigned Tmp = MRI.createVirtualRegister(&WebAssembly::I32RegClass);
WebAssemblyPeephole.cpp 76 unsigned NewReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg));
WebAssemblyRegisterInfo.cpp 78 unsigned OffsetReg = MRI.createVirtualRegister(&WebAssembly::I32RegClass);
  /external/llvm/lib/Target/ARM/
A15SDOptimizer.cpp 434 unsigned Out = MRI->createVirtualRegister(QPR ? &ARM::QPRRegClass :
454 unsigned Out = MRI->createVirtualRegister(TRC);
470 unsigned Out = MRI->createVirtualRegister(&ARM::QPRRegClass);
489 unsigned Out = MRI->createVirtualRegister(&ARM::DPRRegClass);
505 unsigned Out = MRI->createVirtualRegister(&ARM::DPR_VFP2RegClass);
521 unsigned Out = MRI->createVirtualRegister(&ARM::DPRRegClass);
ARMISelLowering.cpp     [all...]
  /external/mesa3d/src/gallium/drivers/radeon/
R600ISelLowering.cpp 120 unsigned NewAddr = MRI.createVirtualRegister(
122 unsigned ShiftValue = MRI.createVirtualRegister(
157 unsigned t0 = MRI.createVirtualRegister(&AMDGPU::R600_Reg128RegClass);
158 unsigned t1 = MRI.createVirtualRegister(&AMDGPU::R600_Reg128RegClass);
179 unsigned t0 = MRI.createVirtualRegister(AMDGPU::R600_Reg128RegisterClass);
180 unsigned t1 = MRI.createVirtualRegister(AMDGPU::R600_Reg128RegisterClass);
SIAssignInterpRegs.cpp 113 unsigned virt_reg = MRI.createVirtualRegister(&AMDGPU::VReg_32RegClass);
  /external/llvm/lib/CodeGen/SelectionDAG/
InstrEmitter.cpp 175 VRBase = MRI->createVirtualRegister(DstRC);
264 VRBase = MRI->createVirtualRegister(RC);
294 VReg = MRI->createVirtualRegister(RC);
337 unsigned NewVReg = MRI->createVirtualRegister(DstRC);
460 unsigned NewReg = MRI->createVirtualRegister(RC);
507 VRBase = MRI->createVirtualRegister(TRC);
521 VRBase = MRI->createVirtualRegister(TRC);
553 VRBase = MRI->createVirtualRegister(SRC);
594 unsigned NewVReg = MRI->createVirtualRegister(DstRC);
611 unsigned NewVReg = MRI->createVirtualRegister(TRI->getAllocatableClass(RC))
    [all...]
  /external/llvm/lib/CodeGen/
LiveRangeEdit.cpp 35 unsigned VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg));
44 unsigned VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg));
393 // MachineRegisterInfo::createVirtualRegister.
  /external/llvm/lib/Target/Hexagon/
HexagonGenPredicate.cpp 250 unsigned NewPR = MRI->createVirtualRegister(PredRC);
404 Register NewPR = MRI->createVirtualRegister(PredRC);
418 unsigned NewOutR = MRI->createVirtualRegister(RC);
HexagonSplitDouble.cpp 645 unsigned NewR = MRI->createVirtualRegister(RC);
789 unsigned TmpR = MRI->createVirtualRegister(IntRC);
929 unsigned TmpR1 = MRI->createVirtualRegister(IntRC);
934 unsigned TmpR2 = MRI->createVirtualRegister(IntRC);
    [all...]
HexagonBitSimplify.cpp     [all...]
  /external/llvm/lib/Target/AArch64/
AArch64CleanupLocalDynamicTLSPass.cpp 117 *TLSBaseAddrReg = RegInfo.createVirtualRegister(&AArch64::GPR64RegClass);
  /external/llvm/lib/Target/SystemZ/
SystemZLDCleanup.cpp 133 *TLSBaseAddrReg = RegInfo.createVirtualRegister(&SystemZ::GR64BitRegClass);
SystemZRegisterInfo.cpp 102 MF.getRegInfo().createVirtualRegister(&SystemZ::ADDR64BitRegClass);
SystemZISelLowering.cpp     [all...]

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