| /system/core/libpixelflinger/codeflinger/ |
| Arm64Disassembler.cpp | 43 {0xff000000, 0x91000000, "add <xd|sp>, <xn|sp>, #<imm1>, <shift1>"},
44 {0xff000000, 0xd1000000, "sub <xd|sp>, <xn|sp>, #<imm1>, <shift1>"},
136 if(strcmp(token, "<imm1>") == 0)
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| /toolchain/binutils/binutils-2.25/opcodes/ |
| ia64-opc.h | 97 #define IMM1 IA64_OPND_IMM1
|
| m32r-desc.c | 291 { M32R_F_IMM1, "f-imm1", 0, 32, 15, 1, { 0, { { { (1<<MACH_BASE), 0 } } } } },
369 /* imm1: 1 bit immediate */
370 { "imm1", M32R_OPERAND_IMM1, HW_H_UINT, 15, 1,
960 /* rac $accd,$accs,$imm1 */
970 /* rach $accd,$accs,$imm1 */
[all...] |
| m32r-opc.c | 840 /* rac $accd,$accs,$imm1 */
843 { { MNEM, ' ', OP (ACCD), ',', OP (ACCS), ',', OP (IMM1), 0 } },
852 /* rach $accd,$accs,$imm1 */
855 { { MNEM, ' ', OP (ACCD), ',', OP (ACCS), ',', OP (IMM1), 0 } },
[all...] |
| i386-opc.h | 645 Imm1,
761 unsigned int imm1:1; member in struct:i386_operand_type::__anon76352
|
| i386-gen.c | 263 "Imm1" },
534 BITFIELD (Imm1),
[all...] |
| m32r-opinst.c | 392 { INPUT, "imm1", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (IMM1), 0, 0 },
[all...] |
| ia64-opc-i.c | 171 {"dep", I, OpX2X (5, 3, 1), {R1, IMM1, R3, CPOS6b, LEN6}, EMPTY},
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| aarch64-opc.c | 955 const simd_imm_encoding *imm1 = (const simd_imm_encoding *)i1;
958 if (imm1->imm < imm2->imm)
960 if (imm1->imm > imm2->imm)
953 const simd_imm_encoding *imm1 = (const simd_imm_encoding *)i1; local
[all...] |
| /external/llvm/test/CodeGen/PowerPC/ |
| fp128-bitcast-after-operation.ll | 68 ; PPC64-P8-DAG: li [[IMM1:[0-9]+]], 1
69 ; PPC64-P8-DAG: sldi [[FLIP_BIT]], [[IMM1]], 63
|
| /external/ltrace/sysdeps/linux-gnu/arm/ |
| trace.c | 444 const int imm1 = SBITS(inst1, 0, 10); local
450 = ((imm1 << 12) + (imm2 << 1));
476 const unsigned imm1 = BITS(inst1, 0, 5); local
483 offset += (imm1 << 12) + (imm2 << 1);
|
| /toolchain/binutils/binutils-2.25/cpu/ |
| m32r.cpu | 502 (define-ifield (name f-imm1) (comment "1 bit immediate, 0->1 1->2")
688 (duhpo imm1 "1 bit immediate" ((MACH m32rx,m32r2)) h-uint f-imm1)
[all...] |
| m32c.cpu | 368 (df f-imm1-S "1 bit immediate for short format binary insns" (MACH32 m32c-isa) 2 1 UINT
[all...] |
| ChangeLog | 116 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
|
| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_peephole.cpp | 390 ImmediateValue &imm0, ImmediateValue &imm1)
392 struct Storage *const a = &imm0.reg, *const b = &imm1.reg;
559 ImmediateValue imm1; local
570 if (mul1->src(s1 = 0).getImmediate(imm1) ||
571 mul1->src(s1 = 1).getImmediate(imm1)) {
573 // a = mul r, imm1
574 // d = mul a, imm2 -> d = mul r, (imm1 * imm2)
575 mul1->setSrc(s1, bld.loadImm(NULL, f * imm1.reg.data.f32));
603 if (!insn->src(s2).mod && !insn->src(t2).getImmediate(imm1))
798 ImmediateValue imm1; local
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonIntrinsics.td | 28 class T_II_pat <InstHexagon MI, Intrinsic IntID, PatFrag Imm1, PatFrag Imm2>
29 : Pat<(IntID Imm1:$Is, Imm2:$It),
30 (MI Imm1:$Is, Imm2:$It)>;
56 class T_QII_pat <InstHexagon MI, Intrinsic IntID, PatFrag Imm1, PatFrag Imm2>
57 : Pat <(IntID (i32 PredRegs:$Ps), Imm1:$Is, Imm2:$It),
58 (MI PredRegs:$Ps, Imm1:$Is, Imm2:$It)>;
[all...] |
| /external/vixl/test/ |
| test-simulator-a64.cc | 175 const VRegister& vd, int imm1, const VRegister& vn, int imm2);
[all...] |
| /art/compiler/utils/arm/ |
| assembler_arm32_test.cc | 670 "sbfx{cond} {reg1}, {reg2}, #{imm1}, #{imm2}"), "sbfx");
694 "ubfx{cond} {reg1}, {reg2}, #{imm1}, #{imm2}"), "ubfx");
|
| assembler_arm_test.h | 541 static constexpr const char* IMM1_TOKEN = "{imm1}";
|
| /external/pcre/dist/sljit/ |
| sljitNativeARM_32.c | 1181 sljit_uw imm1; local
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| FastISel.h | 420 bool Op0IsKill, uint64_t Imm1, uint64_t Imm2);
|
| /external/valgrind/VEX/priv/ |
| guest_tilegx_helpers.c | 244 case 152: /* mm rd, ra, imm0, imm1 */
|
| /toolchain/binutils/binutils-2.25/bfd/ |
| cpu-ia64-opc.c | 572 { ABS, ins_imms, ext_imms, 0, {{ 1, 36}}, SDEC, /* IMM1 */
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| FastISel.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb2SizeReduction.cpp | 62 // Wide, Narrow1, Narrow2, imm1,imm2, lo1, lo2, P/C,PF,S,AM
[all...] |
