| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ppc/ |
| titan.s | 113 mfspr 4, 0x001
115 mfspr 4, 0x008
117 mfspr 4, 0x009
119 mfspr 4, 0x016
121 mfspr 4, 0x01a
123 mfspr 4, 0x01b
125 mfspr 4, 0x030
127 mfspr 4, 0x03a
129 mfspr 4, 0x03b
131 mfspr 4, 0x03
[all...] |
| common.s | 119 mfspr 3,0x80
|
| /external/llvm/test/CodeGen/PowerPC/ |
| mftb.ll | 3 ; On all other CPUs (including generic, ppc, ppc64), the mfspr instruction
8 ; RUN: | FileCheck %s --check-prefix=CHECK-MFSPR
10 ; RUN: | FileCheck %s --check-prefix=CHECK-MFSPR
12 ; RUN: | FileCheck %s --check-prefix=CHECK-MFSPR
14 ; RUN: | FileCheck %s --check-prefix=CHECK-MFSPR
16 ; RUN: | FileCheck %s --check-prefix=CHECK-MFSPR
22 ; CHECK-MFSPR-NOT: warning: deprecated
28 ; CHECK-MFSPR-LABEL: @get_time
29 ; CHECK-MFSPR: mfspr 3, 26
[all...] |
| ppc32-cyclecounter.ll | 13 ; CHECK: mfspr 3, 269
14 ; CHECK: mfspr 4, 268
15 ; CHECK: mfspr [[REG:[0-9]+]], 269
|
| novrsave.ll | 14 ; CHECK-NOT: mfspr
|
| ppc64-cyclecounter.ll | 12 ; CHECK: mfspr 3, 268
|
| htm.ll | 91 ; CHECK: mfspr [[REG1:[0-9]+]], 130
99 ; CHECK: mfspr [[REG1:[0-9]+]], 131
107 ; CHECK: mfspr [[REG1:[0-9]+]], 128
115 ; CHECK: mfspr [[REG1:[0-9]+]], 129
|
| vrsave-spill.ll | 13 ; CHECK: mfspr r{{[0-9]+}}, 256
|
| /external/valgrind/none/tests/ppc32/ |
| bug139050-ppc32.c | 13 __asm__ __volatile__("1: mfspr %0,269\n\t"
14 " mfspr %1,268\n\t"
15 " mfspr %2,269\n\t"
|
| /external/fio/arch/ |
| arch-ppc.h | 51 static inline unsigned int mfspr(unsigned int reg) function
55 asm volatile("mfspr %0,%1": "=r" (val) : "K" (reg));
71 tbu0 = mfspr(SPRN_ATBU);
72 tbl = mfspr(SPRN_ATBL);
73 tbu1 = mfspr(SPRN_ATBU);
75 tbu0 = mfspr(SPRN_TBRU);
76 tbl = mfspr(SPRN_TBRL);
77 tbu1 = mfspr(SPRN_TBRU);
|
| /external/llvm/test/MC/PowerPC/ |
| ppc64-encoding-bookIII.s | 24 # CHECK-BE: mfspr 4, 260 # encoding: [0x7c,0x84,0x42,0xa6]
25 # CHECK-LE: mfspr 4, 260 # encoding: [0xa6,0x42,0x84,0x7c]
28 # CHECK-BE: mfspr 4, 261 # encoding: [0x7c,0x85,0x42,0xa6]
29 # CHECK-LE: mfspr 4, 261 # encoding: [0xa6,0x42,0x85,0x7c]
32 # CHECK-BE: mfspr 4, 262 # encoding: [0x7c,0x86,0x42,0xa6]
33 # CHECK-LE: mfspr 4, 262 # encoding: [0xa6,0x42,0x86,0x7c]
36 # CHECK-BE: mfspr 4, 263 # encoding: [0x7c,0x87,0x42,0xa6]
37 # CHECK-LE: mfspr 4, 263 # encoding: [0xa6,0x42,0x87,0x7c]
40 # CHECK-BE: mfspr 2, 260 # encoding: [0x7c,0x44,0x42,0xa6]
41 # CHECK-LE: mfspr 2, 260 # encoding: [0xa6,0x42,0x44,0x7c
[all...] |
| deprecated-p7.s | 7 # CHECK: mfspr 3, 268
|
| /external/llvm/test/MC/Disassembler/PowerPC/ |
| ppc64-encoding-bookIII.txt | 18 # CHECK: mfspr 4, 272
21 # CHECK: mfspr 4, 273
24 # CHECK: mfspr 4, 274
27 # CHECK: mfspr 4, 275
57 # CHECK: mfspr 4, 22
66 # CHECK: mfspr 4, 25
72 # CHECK: mfspr 4, 26
78 # CHECK: mfspr 4, 27
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/ppc/ |
| copy_altivec.asm | 23 mfspr r11, 256 ;# get old VRSAVE
|
| recon_altivec.asm | 38 mfspr r0, 256 ;# get old VRSAVE
87 mfspr r0, 256 ;# get old VRSAVE
126 mfspr r0, 256 ;# get old VRSAVE
|
| loopfilter_filters_altivec.asm | 591 mfspr r11, 256 ;# get old VRSAVE
619 mfspr r11, 256 ;# get old VRSAVE
677 mfspr r11, 256 ;# get old VRSAVE
770 mfspr r11, 256 ;# get old VRSAVE
904 mfspr r11, 256 ;# get old VRSAVE
932 mfspr r11, 256 ;# get old VRSAVE
1016 mfspr r11, 256 ;# get old VRSAVE
1043 mfspr r11, 256 ;# get old VRSAVE
1111 mfspr r11, 256 ;# get old VRSAVE
1154 mfspr r11, 256 ;# get old VRSAV
[all...] |
| variance_subpixel_altivec.asm | 195 mfspr r11, 256 ;# get old VRSAVE
286 mfspr r11, 256 ;# get old VRSAVE
396 mfspr r11, 256 ;# get old VRSAVE
613 mfspr r11, 256 ;# get old VRSAVE
706 mfspr r11, 256 ;# get old VRSAVE
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/ppc/ |
| rdopt_altivec.asm | 18 mfspr r11, 256 ;# get old VRSAVE
|
| encodemb_altivec.asm | 21 mfspr r11, 256 ;# get old VRSAVE
117 mfspr r11, 256 ;# get old VRSAVE
|
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-tilepro/ |
| reloc.s | 13 { mfspr zero,external_8a }
|
| reloc.d | 32 100b0: [0-9a-f]* { mfspr zero, 17 }
|
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-tilegx/ |
| reloc.s | 13 { mfspr zero,external_8a }
|
| reloc-be.d | 39 100e8: [0-9a-f]* { mfspr zero, 17 }
|
| reloc-le.d | 39 100e8: [0-9a-f]* { mfspr zero, 17 }
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/or1k/ |
| allinsn.s | 117 l.mfspr r0,r0,0
118 l.mfspr r31,r31,65535
119 l.mfspr r16,r16,32768
120 l.mfspr r15,r15,32767
121 l.mfspr r1,r1,1
122 l.mfspr r23,r29,54424
123 l.mfspr r19,r20,4481
124 l.mfspr r26,r2,63446
|
