| /external/llvm/test/CodeGen/X86/ |
| 2012-03-15-build_vector_wl.ll | 7 ; CHECK: pmovzxbd
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| promote.ll | 23 ; CHECK: pmovzxbd
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| trunc-ext-ld-st.ll | 46 ;CHECK: pmovzxbd
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| avx2-pmovxrm-intrinsics.ll | 63 %2 = call <8 x i32> @llvm.x86.avx2.pmovzxbd(<16 x i8> %1)
103 declare <8 x i32> @llvm.x86.avx2.pmovzxbd(<16 x i8>)
|
| sse41-pmovxrm-intrinsics.ll | 119 ; SSE41-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
127 %2 = call <4 x i32> @llvm.x86.sse41.pmovzxbd(<16 x i8> %1)
195 declare <4 x i32> @llvm.x86.sse41.pmovzxbd(<16 x i8>)
|
| sse41-intrinsics-x86.ll | 166 ; CHECK: pmovzxbd
167 %res = call <4 x i32> @llvm.x86.sse41.pmovzxbd(<16 x i8> %a0) ; <<4 x i32>> [#uses=1]
170 declare <4 x i32> @llvm.x86.sse41.pmovzxbd(<16 x i8>) nounwind readnone
|
| widen_load-2.ll | 143 ; CHECK: pmovzxbd (%{{.*}}), %[[R0:xmm[0-9]+]]
144 ; CHECK-NEXT: pmovzxbd (%{{.*}}), %[[R1:xmm[0-9]+]]
194 ; CHECK-NEXT: pmovzxbd (%[[PTR0]]), %[[X0:xmm[0-9]+]]
|
| pointer-vector.ll | 84 ;CHECK: pmovzxbd (%
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| vector-zext.ll | 96 ; SSE41-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
132 ; SSE41-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
134 ; SSE41-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
512 ; SSE41-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
625 ; SSE41-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
626 ; SSE41-NEXT: pmovzxbd {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
[all...] |
| /external/llvm/test/Transforms/InstCombine/ |
| x86-pmovzx.ll | 3 declare <4 x i32> @llvm.x86.sse41.pmovzxbd(<16 x i8>) nounwind readnone
10 declare <8 x i32> @llvm.x86.avx2.pmovzxbd(<16 x i8>) nounwind readnone
27 %res = call <4 x i32> @llvm.x86.sse41.pmovzxbd(<16 x i8> %v)
87 %res = call <8 x i32> @llvm.x86.avx2.pmovzxbd(<16 x i8> %v)
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| sse4_1.s | 80 pmovzxbd %xmm1,%xmm0
81 pmovzxbd (%ecx),%xmm0
175 pmovzxbd xmm0,xmm1
176 pmovzxbd xmm0,DWORD PTR [ecx]
|
| x86-64-sse4_1.s | 88 pmovzxbd %xmm1,%xmm0
89 pmovzxbd (%rcx),%xmm0
191 pmovzxbd xmm0,xmm1
192 pmovzxbd xmm0,DWORD PTR [rcx]
|
| simd.s | 76 pmovzxbd (%eax),%xmm0
175 pmovzxbd xmm0,DWORD PTR [eax] label
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| x86-64-simd.s | 96 pmovzxbd (%rax),%xmm0
223 pmovzxbd xmm0,DWORD PTR [rax] label
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| sse4_1-intel.d | 85 [ ]*[a-f0-9]+: 66 0f 38 31 c1 pmovzxbd xmm0,xmm1
86 [ ]*[a-f0-9]+: 66 0f 38 31 01 pmovzxbd xmm0,DWORD PTR \[ecx\]
178 [ ]*[a-f0-9]+: 66 0f 38 31 c1 pmovzxbd xmm0,xmm1
179 [ ]*[a-f0-9]+: 66 0f 38 31 01 pmovzxbd xmm0,DWORD PTR \[ecx\]
|
| sse4_1.d | 84 [ ]*[0-9a-f]+: 66 0f 38 31 c1 pmovzxbd %xmm1,%xmm0
85 [ ]*[0-9a-f]+: 66 0f 38 31 01 pmovzxbd \(%ecx\),%xmm0
177 [ ]*[a-f0-9]+: 66 0f 38 31 c1 pmovzxbd %xmm1,%xmm0
178 [ ]*[a-f0-9]+: 66 0f 38 31 01 pmovzxbd \(%ecx\),%xmm0
|
| x86-64-sse4_1-intel.d | 93 [ ]*[a-f0-9]+: 66 0f 38 31 c1 pmovzxbd xmm0,xmm1
94 [ ]*[a-f0-9]+: 66 0f 38 31 01 pmovzxbd xmm0,DWORD PTR \[rcx\]
194 [ ]*[a-f0-9]+: 66 0f 38 31 c1 pmovzxbd xmm0,xmm1
195 [ ]*[a-f0-9]+: 66 0f 38 31 01 pmovzxbd xmm0,DWORD PTR \[rcx\]
|
| x86-64-sse4_1.d | 92 [ ]*[a-f0-9]+: 66 0f 38 31 c1 pmovzxbd %xmm1,%xmm0
93 [ ]*[a-f0-9]+: 66 0f 38 31 01 pmovzxbd \(%rcx\),%xmm0
193 [ ]*[a-f0-9]+: 66 0f 38 31 c1 pmovzxbd %xmm1,%xmm0
194 [ ]*[a-f0-9]+: 66 0f 38 31 01 pmovzxbd \(%rcx\),%xmm0
|
| sse2avx.s | 555 pmovzxbd %xmm4,%xmm6
556 pmovzxbd (%ecx),%xmm4
1216 pmovzxbd xmm6,xmm4
1217 pmovzxbd xmm4,DWORD PTR [ecx]
|
| x86-64-sse2avx.s | 579 pmovzxbd %xmm4,%xmm6
580 pmovzxbd (%rcx),%xmm4
1283 pmovzxbd xmm6,xmm4
1284 pmovzxbd xmm4,DWORD PTR [rcx]
|
| simd-intel.d | 82 [ ]*[a-f0-9]+: 66 0f 38 31 00 pmovzxbd xmm0,DWORD PTR \[eax\]
175 [ ]*[a-f0-9]+: 66 0f 38 31 00 pmovzxbd xmm0,DWORD PTR \[eax\]
|
| simd-suffix.d | 82 [ ]*[a-f0-9]+: 66 0f 38 31 00 pmovzxbd \(%eax\),%xmm0
175 [ ]*[a-f0-9]+: 66 0f 38 31 00 pmovzxbd \(%eax\),%xmm0
|
| simd.d | 81 [ ]*[a-f0-9]+: 66 0f 38 31 00 pmovzxbd \(%eax\),%xmm0
174 [ ]*[a-f0-9]+: 66 0f 38 31 00 pmovzxbd \(%eax\),%xmm0
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ilp32/ |
| x86-64-sse4_1-intel.d | 93 [ ]*[a-f0-9]+: 66 0f 38 31 c1 pmovzxbd xmm0,xmm1
94 [ ]*[a-f0-9]+: 66 0f 38 31 01 pmovzxbd xmm0,DWORD PTR \[rcx\]
194 [ ]*[a-f0-9]+: 66 0f 38 31 c1 pmovzxbd xmm0,xmm1
195 [ ]*[a-f0-9]+: 66 0f 38 31 01 pmovzxbd xmm0,DWORD PTR \[rcx\]
|
| x86-64-sse4_1.d | 93 [ ]*[a-f0-9]+: 66 0f 38 31 c1 pmovzxbd %xmm1,%xmm0
94 [ ]*[a-f0-9]+: 66 0f 38 31 01 pmovzxbd \(%rcx\),%xmm0
194 [ ]*[a-f0-9]+: 66 0f 38 31 c1 pmovzxbd %xmm1,%xmm0
195 [ ]*[a-f0-9]+: 66 0f 38 31 01 pmovzxbd \(%rcx\),%xmm0
|
