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  /external/llvm/lib/Target/PowerPC/
PPCInstrVSX.td     [all...]
PPCRegisterInfo.td 19 def sub_64 : SubRegIndex<64>;
56 let SubRegIndices = [sub_64];
71 let SubRegIndices = [sub_64];
79 let SubRegIndices = [sub_64];
PPCVSXCopy.cpp 123 PPC::sub_64); member in class:__anon19253::PPCVSXCopy::PPC
150 PPC::sub_64); member in class:__anon19253::PPCVSXCopy::PPC
PPCInstrQPX.td     [all...]
PPCInstrInfo.cpp 824 TRI->getMatchingSuperReg(DestReg, PPC::sub_64, &PPC::VSRCRegClass);
842 TRI->getMatchingSuperReg(SrcReg, PPC::sub_64, &PPC::VSRCRegClass);
    [all...]
  /external/llvm/lib/Target/Mips/
MipsRegisterInfo.td 15 def sub_64 : SubRegIndex<64>;
69 let SubRegIndices = [sub_64];
MipsSEISelLowering.cpp     [all...]
MipsMSAInstrInfo.td     [all...]
  /external/llvm/test/CodeGen/Mips/msa/
basic_operations_float.ll 209 ; $w0:sub_64
230 ; Element 0 can be obtained by extracting $w0:sub_64 ($f0)

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