1 /* 2 * Copyright (C) 2015 The Android Open Source Project 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 17 */ 18 19 #ifndef SPI_CONTEXHUB_H 20 21 #define SPI_CONTEXHUB_H 22 23 #define SPI_CPHA 0x01 24 #define SPI_CPOL 0x02 25 26 #define SPI_MODE_0 (0|0) 27 #define SPI_MODE_1 (0|SPI_CPHA) 28 #define SPI_MODE_2 (SPI_CPOL|0) 29 #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) 30 31 #define SPI_CS_HIGH 0x04 32 #define SPI_LSB_FIRST 0x08 33 #define SPI_3WIRE 0x10 34 #define SPI_LOOP 0x20 35 #define SPI_NO_CS 0x40 36 #define SPI_READY 0x80 37 38 #define SPI_IOC_MAGIC 'k' 39 40 struct spi_ioc_transfer { 41 __u64 tx_buf; 42 __u64 rx_buf; 43 44 __u32 len; 45 __u32 speed_hz; 46 47 __u16 delay_usecs; 48 __u8 bits_per_word; 49 __u8 cs_change; 50 __u32 pad; 51 52 /* If the contents of 'struct spi_ioc_transfer' ever change 53 * incompatibly, then the ioctl number (currently 0) must change; 54 * ioctls with constant size fields get a bit more in the way of 55 * error checking than ones (like this) where that field varies. 56 * 57 * NOTE: struct layout is the same in 64bit and 32bit userspace. 58 */ 59 }; 60 61 /* not all platforms use <asm-generic/ioctl.h> or _IOC_TYPECHECK() ... */ 62 #define SPI_MSGSIZE(N) \ 63 ((((N)*(sizeof (struct spi_ioc_transfer))) < (1 << _IOC_SIZEBITS)) \ 64 ? ((N)*(sizeof (struct spi_ioc_transfer))) : 0) 65 66 #define SPI_IOC_MESSAGE(N) _IOW(SPI_IOC_MAGIC, 0, char[SPI_MSGSIZE(N)]) 67 68 /* Read / Write of SPI mode (SPI_MODE_0..SPI_MODE_3) */ 69 #define SPI_IOC_RD_MODE _IOR(SPI_IOC_MAGIC, 1, __u8) 70 #define SPI_IOC_WR_MODE _IOW(SPI_IOC_MAGIC, 1, __u8) 71 72 /* Read / Write SPI bit justification */ 73 #define SPI_IOC_RD_LSB_FIRST _IOR(SPI_IOC_MAGIC, 2, __u8) 74 #define SPI_IOC_WR_LSB_FIRST _IOW(SPI_IOC_MAGIC, 2, __u8) 75 76 /* Read / Write SPI device word length (1..N) */ 77 #define SPI_IOC_RD_BITS_PER_WORD _IOR(SPI_IOC_MAGIC, 3, __u8) 78 #define SPI_IOC_WR_BITS_PER_WORD _IOW(SPI_IOC_MAGIC, 3, __u8) 79 80 /* Read / Write SPI device default max speed hz */ 81 #define SPI_IOC_RD_MAX_SPEED_HZ _IOR(SPI_IOC_MAGIC, 4, __u32) 82 #define SPI_IOC_WR_MAX_SPEED_HZ _IOW(SPI_IOC_MAGIC, 4, __u32) 83 84 #define SPI_IOC_ENABLE_TIMESTAMPS _IOW(SPI_IOC_MAGIC, 5, __u8) 85 #define SPI_IOC_RESET_HUB _IOW(SPI_IOC_MAGIC, 6, __u8) 86 #define SPI_IOC_TXRX _IOW(SPI_IOC_MAGIC, 7, char[SPI_MSGSIZE(1)]) 87 #define SPI_IOC_NOTIFY_HUB_SUSPENDED _IOW(SPI_IOC_MAGIC, 8, __u8) 88 89 #endif // SPI_CONTEXHUB_H 90
