1 // RUN: %clang_cc1 -triple armv8.1a-linux-gnu -target-feature +neon \ 2 // RUN: -O3 -S -o - %s \ 3 // RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARM 4 // RUN: %clang_cc1 -triple aarch64-linux-gnu -target-feature +neon \ 5 // RUN: -target-feature +v8.1a -O3 -S -o - %s \ 6 // RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AARCH64 7 // REQUIRES: arm-registered-target,aarch64-registered-target 8 9 #include <arm_neon.h> 10 11 // CHECK-LABEL: test_vqrdmlah_s16 12 int16x4_t test_vqrdmlah_s16(int16x4_t a, int16x4_t b, int16x4_t c) { 13 // CHECK-ARM: vqrdmlah.s16 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}} 14 // CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 15 return vqrdmlah_s16(a, b, c); 16 } 17 18 // CHECK-LABEL: test_vqrdmlah_s32 19 int32x2_t test_vqrdmlah_s32(int32x2_t a, int32x2_t b, int32x2_t c) { 20 // CHECK-ARM: vqrdmlah.s32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}} 21 // CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 22 return vqrdmlah_s32(a, b, c); 23 } 24 25 // CHECK-LABEL: test_vqrdmlahq_s16 26 int16x8_t test_vqrdmlahq_s16(int16x8_t a, int16x8_t b, int16x8_t c) { 27 // CHECK-ARM: vqrdmlah.s16 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} 28 // CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 29 return vqrdmlahq_s16(a, b, c); 30 } 31 32 // CHECK-LABEL: test_vqrdmlahq_s32 33 int32x4_t test_vqrdmlahq_s32(int32x4_t a, int32x4_t b, int32x4_t c) { 34 // CHECK-ARM: vqrdmlah.s32 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} 35 // CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 36 return vqrdmlahq_s32(a, b, c); 37 } 38 39 // CHECK-LABEL: test_vqrdmlah_lane_s16 40 int16x4_t test_vqrdmlah_lane_s16(int16x4_t a, int16x4_t b, int16x4_t c) { 41 // CHECK-ARM: vqrdmlah.s16 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}[3] 42 // CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3] 43 return vqrdmlah_lane_s16(a, b, c, 3); 44 } 45 46 // CHECK-LABEL: test_vqrdmlah_lane_s32 47 int32x2_t test_vqrdmlah_lane_s32(int32x2_t a, int32x2_t b, int32x2_t c) { 48 // CHECK-ARM: vqrdmlah.s32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}[1] 49 // CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1] 50 return vqrdmlah_lane_s32(a, b, c, 1); 51 } 52 53 // CHECK-LABEL: test_vqrdmlahq_lane_s16 54 int16x8_t test_vqrdmlahq_lane_s16(int16x8_t a, int16x8_t b, int16x4_t c) { 55 // CHECK-ARM: vqrdmlah.s16 q{{[0-9]+}}, q{{[0-9]+}}, d{{[0-9]+}}[3] 56 // CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3] 57 return vqrdmlahq_lane_s16(a, b, c, 3); 58 } 59 60 // CHECK-LABEL: test_vqrdmlahq_lane_s32 61 int32x4_t test_vqrdmlahq_lane_s32(int32x4_t a, int32x4_t b, int32x2_t c) { 62 // CHECK-ARM: vqrdmlah.s32 q{{[0-9]+}}, q{{[0-9]+}}, d{{[0-9]+}}[1] 63 // CHECK-AARCH64: sqrdmlah {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1] 64 return vqrdmlahq_lane_s32(a, b, c, 1); 65 } 66 67 // CHECK-LABEL: test_vqrdmlsh_s16 68 int16x4_t test_vqrdmlsh_s16(int16x4_t a, int16x4_t b, int16x4_t c) { 69 // CHECK-ARM: vqrdmlsh.s16 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}} 70 // CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 71 return vqrdmlsh_s16(a, b, c); 72 } 73 74 // CHECK-LABEL: test_vqrdmlsh_s32 75 int32x2_t test_vqrdmlsh_s32(int32x2_t a, int32x2_t b, int32x2_t c) { 76 // CHECK-ARM: vqrdmlsh.s32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}} 77 // CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 78 return vqrdmlsh_s32(a, b, c); 79 } 80 81 // CHECK-LABEL: test_vqrdmlshq_s16 82 int16x8_t test_vqrdmlshq_s16(int16x8_t a, int16x8_t b, int16x8_t c) { 83 // CHECK-ARM: vqrdmlsh.s16 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} 84 // CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 85 return vqrdmlshq_s16(a, b, c); 86 } 87 88 // CHECK-LABEL: test_vqrdmlshq_s32 89 int32x4_t test_vqrdmlshq_s32(int32x4_t a, int32x4_t b, int32x4_t c) { 90 // CHECK-ARM: vqrdmlsh.s32 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} 91 // CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 92 return vqrdmlshq_s32(a, b, c); 93 } 94 95 // CHECK-LABEL: test_vqrdmlsh_lane_s16 96 int16x4_t test_vqrdmlsh_lane_s16(int16x4_t a, int16x4_t b, int16x4_t c) { 97 // CHECK-ARM: vqrdmlsh.s16 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}[3] 98 // CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.h[3] 99 return vqrdmlsh_lane_s16(a, b, c, 3); 100 } 101 102 // CHECK-LABEL: test_vqrdmlsh_lane_s32 103 int32x2_t test_vqrdmlsh_lane_s32(int32x2_t a, int32x2_t b, int32x2_t c) { 104 // CHECK-ARM: vqrdmlsh.s32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}[1] 105 // CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[1] 106 return vqrdmlsh_lane_s32(a, b, c, 1); 107 } 108 109 // CHECK-LABEL: test_vqrdmlshq_lane_s16 110 int16x8_t test_vqrdmlshq_lane_s16(int16x8_t a, int16x8_t b, int16x4_t c) { 111 // CHECK-ARM: vqrdmlsh.s16 q{{[0-9]+}}, q{{[0-9]+}}, d{{[0-9]+}}[3] 112 // CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[3] 113 return vqrdmlshq_lane_s16(a, b, c, 3); 114 } 115 116 // CHECK-LABEL: test_vqrdmlshq_lane_s32 117 int32x4_t test_vqrdmlshq_lane_s32(int32x4_t a, int32x4_t b, int32x2_t c) { 118 // CHECK-ARM: vqrdmlsh.s32 q{{[0-9]+}}, q{{[0-9]+}}, d{{[0-9]+}}[1] 119 // CHECK-AARCH64: sqrdmlsh {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[1] 120 return vqrdmlshq_lane_s32(a, b, c, 1); 121 } 122 123
