1 /* 2 * Copyright (c) 2007 Dave Airlie <airlied (at) linux.ie> 3 * Copyright (c) 2007 Jakob Bornecrantz <wallbraker (at) gmail.com> 4 * Copyright (c) 2008 Red Hat Inc. 5 * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA 6 * Copyright (c) 2007-2008 Intel Corporation 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a 9 * copy of this software and associated documentation files (the "Software"), 10 * to deal in the Software without restriction, including without limitation 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * and/or sell copies of the Software, and to permit persons to whom the 13 * Software is furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 21 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 24 * IN THE SOFTWARE. 25 */ 26 27 #ifndef _DRM_MODE_H 28 #define _DRM_MODE_H 29 30 #define DRM_DISPLAY_INFO_LEN 32 31 #define DRM_CONNECTOR_NAME_LEN 32 32 #define DRM_DISPLAY_MODE_LEN 32 33 #define DRM_PROP_NAME_LEN 32 34 35 #define DRM_MODE_TYPE_BUILTIN (1<<0) 36 #define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN) 37 #define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN) 38 #define DRM_MODE_TYPE_PREFERRED (1<<3) 39 #define DRM_MODE_TYPE_DEFAULT (1<<4) 40 #define DRM_MODE_TYPE_USERDEF (1<<5) 41 #define DRM_MODE_TYPE_DRIVER (1<<6) 42 43 /* Video mode flags */ 44 /* bit compatible with the xorg definitions. */ 45 #define DRM_MODE_FLAG_PHSYNC (1<<0) 46 #define DRM_MODE_FLAG_NHSYNC (1<<1) 47 #define DRM_MODE_FLAG_PVSYNC (1<<2) 48 #define DRM_MODE_FLAG_NVSYNC (1<<3) 49 #define DRM_MODE_FLAG_INTERLACE (1<<4) 50 #define DRM_MODE_FLAG_DBLSCAN (1<<5) 51 #define DRM_MODE_FLAG_CSYNC (1<<6) 52 #define DRM_MODE_FLAG_PCSYNC (1<<7) 53 #define DRM_MODE_FLAG_NCSYNC (1<<8) 54 #define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */ 55 #define DRM_MODE_FLAG_BCAST (1<<10) 56 #define DRM_MODE_FLAG_PIXMUX (1<<11) 57 #define DRM_MODE_FLAG_DBLCLK (1<<12) 58 #define DRM_MODE_FLAG_CLKDIV2 (1<<13) 59 #define DRM_MODE_FLAG_3D_MASK (0x1f<<14) 60 #define DRM_MODE_FLAG_3D_NONE (0<<14) 61 #define DRM_MODE_FLAG_3D_FRAME_PACKING (1<<14) 62 #define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2<<14) 63 #define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3<<14) 64 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4<<14) 65 #define DRM_MODE_FLAG_3D_L_DEPTH (5<<14) 66 #define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6<<14) 67 #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7<<14) 68 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8<<14) 69 70 71 /* DPMS flags */ 72 /* bit compatible with the xorg definitions. */ 73 #define DRM_MODE_DPMS_ON 0 74 #define DRM_MODE_DPMS_STANDBY 1 75 #define DRM_MODE_DPMS_SUSPEND 2 76 #define DRM_MODE_DPMS_OFF 3 77 78 /* Scaling mode options */ 79 #define DRM_MODE_SCALE_NONE 0 /* Unmodified timing (display or 80 software can still scale) */ 81 #define DRM_MODE_SCALE_FULLSCREEN 1 /* Full screen, ignore aspect */ 82 #define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */ 83 #define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */ 84 85 /* Dithering mode options */ 86 #define DRM_MODE_DITHERING_OFF 0 87 #define DRM_MODE_DITHERING_ON 1 88 #define DRM_MODE_DITHERING_AUTO 2 89 90 /* Dirty info options */ 91 #define DRM_MODE_DIRTY_OFF 0 92 #define DRM_MODE_DIRTY_ON 1 93 #define DRM_MODE_DIRTY_ANNOTATE 2 94 95 /* rotation property bits */ 96 #define DRM_ROTATE_0 0 97 #define DRM_ROTATE_90 1 98 #define DRM_ROTATE_180 2 99 #define DRM_ROTATE_270 3 100 #define DRM_REFLECT_X 4 101 #define DRM_REFLECT_Y 5 102 103 struct drm_mode_modeinfo { 104 __u32 clock; 105 __u16 hdisplay, hsync_start, hsync_end, htotal, hskew; 106 __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan; 107 108 __u32 vrefresh; 109 110 __u32 flags; 111 __u32 type; 112 char name[DRM_DISPLAY_MODE_LEN]; 113 }; 114 115 struct drm_mode_card_res { 116 __u64 fb_id_ptr; 117 __u64 crtc_id_ptr; 118 __u64 connector_id_ptr; 119 __u64 encoder_id_ptr; 120 __u32 count_fbs; 121 __u32 count_crtcs; 122 __u32 count_connectors; 123 __u32 count_encoders; 124 __u32 min_width, max_width; 125 __u32 min_height, max_height; 126 }; 127 128 struct drm_mode_crtc { 129 __u64 set_connectors_ptr; 130 __u32 count_connectors; 131 132 __u32 crtc_id; /**< Id */ 133 __u32 fb_id; /**< Id of framebuffer */ 134 135 __u32 x, y; /**< Position on the frameuffer */ 136 137 __u32 gamma_size; 138 __u32 mode_valid; 139 struct drm_mode_modeinfo mode; 140 }; 141 142 #define DRM_MODE_PRESENT_TOP_FIELD (1<<0) 143 #define DRM_MODE_PRESENT_BOTTOM_FIELD (1<<1) 144 145 /* Planes blend with or override other bits on the CRTC */ 146 struct drm_mode_set_plane { 147 __u32 plane_id; 148 __u32 crtc_id; 149 __u32 fb_id; /* fb object contains surface format type */ 150 __u32 flags; 151 152 /* Signed dest location allows it to be partially off screen */ 153 __s32 crtc_x, crtc_y; 154 __u32 crtc_w, crtc_h; 155 156 /* Source values are 16.16 fixed point */ 157 __u32 src_x, src_y; 158 __u32 src_h, src_w; 159 }; 160 161 struct drm_mode_get_plane { 162 __u32 plane_id; 163 164 __u32 crtc_id; 165 __u32 fb_id; 166 167 __u32 possible_crtcs; 168 __u32 gamma_size; 169 170 __u32 count_format_types; 171 __u64 format_type_ptr; 172 }; 173 174 struct drm_mode_get_plane_res { 175 __u64 plane_id_ptr; 176 __u32 count_planes; 177 }; 178 179 #define DRM_MODE_ENCODER_NONE 0 180 #define DRM_MODE_ENCODER_DAC 1 181 #define DRM_MODE_ENCODER_TMDS 2 182 #define DRM_MODE_ENCODER_LVDS 3 183 #define DRM_MODE_ENCODER_TVDAC 4 184 #define DRM_MODE_ENCODER_VIRTUAL 5 185 #define DRM_MODE_ENCODER_DSI 6 186 #define DRM_MODE_ENCODER_DPMST 7 187 188 struct drm_mode_get_encoder { 189 __u32 encoder_id; 190 __u32 encoder_type; 191 192 __u32 crtc_id; /**< Id of crtc */ 193 194 __u32 possible_crtcs; 195 __u32 possible_clones; 196 }; 197 198 /* This is for connectors with multiple signal types. */ 199 /* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */ 200 #define DRM_MODE_SUBCONNECTOR_Automatic 0 201 #define DRM_MODE_SUBCONNECTOR_Unknown 0 202 #define DRM_MODE_SUBCONNECTOR_DVID 3 203 #define DRM_MODE_SUBCONNECTOR_DVIA 4 204 #define DRM_MODE_SUBCONNECTOR_Composite 5 205 #define DRM_MODE_SUBCONNECTOR_SVIDEO 6 206 #define DRM_MODE_SUBCONNECTOR_Component 8 207 #define DRM_MODE_SUBCONNECTOR_SCART 9 208 209 #define DRM_MODE_CONNECTOR_Unknown 0 210 #define DRM_MODE_CONNECTOR_VGA 1 211 #define DRM_MODE_CONNECTOR_DVII 2 212 #define DRM_MODE_CONNECTOR_DVID 3 213 #define DRM_MODE_CONNECTOR_DVIA 4 214 #define DRM_MODE_CONNECTOR_Composite 5 215 #define DRM_MODE_CONNECTOR_SVIDEO 6 216 #define DRM_MODE_CONNECTOR_LVDS 7 217 #define DRM_MODE_CONNECTOR_Component 8 218 #define DRM_MODE_CONNECTOR_9PinDIN 9 219 #define DRM_MODE_CONNECTOR_DisplayPort 10 220 #define DRM_MODE_CONNECTOR_HDMIA 11 221 #define DRM_MODE_CONNECTOR_HDMIB 12 222 #define DRM_MODE_CONNECTOR_TV 13 223 #define DRM_MODE_CONNECTOR_eDP 14 224 #define DRM_MODE_CONNECTOR_VIRTUAL 15 225 #define DRM_MODE_CONNECTOR_DSI 16 226 227 struct drm_mode_get_connector { 228 229 __u64 encoders_ptr; 230 __u64 modes_ptr; 231 __u64 props_ptr; 232 __u64 prop_values_ptr; 233 234 __u32 count_modes; 235 __u32 count_props; 236 __u32 count_encoders; 237 238 __u32 encoder_id; /**< Current Encoder */ 239 __u32 connector_id; /**< Id */ 240 __u32 connector_type; 241 __u32 connector_type_id; 242 243 __u32 connection; 244 __u32 mm_width, mm_height; /**< HxW in millimeters */ 245 __u32 subpixel; 246 }; 247 248 #define DRM_MODE_PROP_PENDING (1<<0) 249 #define DRM_MODE_PROP_RANGE (1<<1) 250 #define DRM_MODE_PROP_IMMUTABLE (1<<2) 251 #define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */ 252 #define DRM_MODE_PROP_BLOB (1<<4) 253 #define DRM_MODE_PROP_BITMASK (1<<5) /* bitmask of enumerated types */ 254 255 /* non-extended types: legacy bitmask, one bit per type: */ 256 #define DRM_MODE_PROP_LEGACY_TYPE ( \ 257 DRM_MODE_PROP_RANGE | \ 258 DRM_MODE_PROP_ENUM | \ 259 DRM_MODE_PROP_BLOB | \ 260 DRM_MODE_PROP_BITMASK) 261 262 /* extended-types: rather than continue to consume a bit per type, 263 * grab a chunk of the bits to use as integer type id. 264 */ 265 #define DRM_MODE_PROP_EXTENDED_TYPE 0x0000ffc0 266 #define DRM_MODE_PROP_TYPE(n) ((n) << 6) 267 #define DRM_MODE_PROP_OBJECT DRM_MODE_PROP_TYPE(1) 268 #define DRM_MODE_PROP_SIGNED_RANGE DRM_MODE_PROP_TYPE(2) 269 270 /* the PROP_ATOMIC flag is used to hide properties from userspace that 271 * is not aware of atomic properties. This is mostly to work around 272 * older userspace (DDX drivers) that read/write each prop they find, 273 * witout being aware that this could be triggering a lengthy modeset. 274 */ 275 #define DRM_MODE_PROP_ATOMIC 0x80000000 276 277 struct drm_mode_property_enum { 278 __u64 value; 279 char name[DRM_PROP_NAME_LEN]; 280 }; 281 282 struct drm_mode_get_property { 283 __u64 values_ptr; /* values and blob lengths */ 284 __u64 enum_blob_ptr; /* enum and blob id ptrs */ 285 286 __u32 prop_id; 287 __u32 flags; 288 char name[DRM_PROP_NAME_LEN]; 289 290 __u32 count_values; 291 __u32 count_enum_blobs; 292 }; 293 294 struct drm_mode_connector_set_property { 295 __u64 value; 296 __u32 prop_id; 297 __u32 connector_id; 298 }; 299 300 #define DRM_MODE_OBJECT_CRTC 0xcccccccc 301 #define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0 302 #define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0 303 #define DRM_MODE_OBJECT_MODE 0xdededede 304 #define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0 305 #define DRM_MODE_OBJECT_FB 0xfbfbfbfb 306 #define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb 307 #define DRM_MODE_OBJECT_PLANE 0xeeeeeeee 308 309 struct drm_mode_obj_get_properties { 310 __u64 props_ptr; 311 __u64 prop_values_ptr; 312 __u32 count_props; 313 __u32 obj_id; 314 __u32 obj_type; 315 }; 316 317 struct drm_mode_obj_set_property { 318 __u64 value; 319 __u32 prop_id; 320 __u32 obj_id; 321 __u32 obj_type; 322 }; 323 324 struct drm_mode_get_blob { 325 __u32 blob_id; 326 __u32 length; 327 __u64 data; 328 }; 329 330 struct drm_mode_fb_cmd { 331 __u32 fb_id; 332 __u32 width, height; 333 __u32 pitch; 334 __u32 bpp; 335 __u32 depth; 336 /* driver specific handle */ 337 __u32 handle; 338 }; 339 340 #define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */ 341 #define DRM_MODE_FB_MODIFIERS (1<<1) /* enables ->modifer[] */ 342 343 struct drm_mode_fb_cmd2 { 344 __u32 fb_id; 345 __u32 width, height; 346 __u32 pixel_format; /* fourcc code from drm_fourcc.h */ 347 __u32 flags; 348 349 /* 350 * In case of planar formats, this ioctl allows up to 4 351 * buffer objects with offsets and pitches per plane. 352 * The pitch and offset order is dictated by the fourcc, 353 * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as: 354 * 355 * YUV 4:2:0 image with a plane of 8 bit Y samples 356 * followed by an interleaved U/V plane containing 357 * 8 bit 2x2 subsampled colour difference samples. 358 * 359 * So it would consist of Y as offset[0] and UV as 360 * offset[1]. Note that offset[0] will generally 361 * be 0. 362 * 363 * To accommodate tiled, compressed, etc formats, a per-plane 364 * modifier can be specified. The default value of zero 365 * indicates "native" format as specified by the fourcc. 366 * Vendor specific modifier token. This allows, for example, 367 * different tiling/swizzling pattern on different planes. 368 * See discussion above of DRM_FORMAT_MOD_xxx. 369 */ 370 __u32 handles[4]; 371 __u32 pitches[4]; /* pitch for each plane */ 372 __u32 offsets[4]; /* offset of each plane */ 373 __u64 modifier[4]; /* ie, tiling, compressed (per plane) */ 374 }; 375 376 #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01 377 #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02 378 #define DRM_MODE_FB_DIRTY_FLAGS 0x03 379 380 /* 381 * Mark a region of a framebuffer as dirty. 382 * 383 * Some hardware does not automatically update display contents 384 * as a hardware or software draw to a framebuffer. This ioctl 385 * allows userspace to tell the kernel and the hardware what 386 * regions of the framebuffer have changed. 387 * 388 * The kernel or hardware is free to update more then just the 389 * region specified by the clip rects. The kernel or hardware 390 * may also delay and/or coalesce several calls to dirty into a 391 * single update. 392 * 393 * Userspace may annotate the updates, the annotates are a 394 * promise made by the caller that the change is either a copy 395 * of pixels or a fill of a single color in the region specified. 396 * 397 * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then 398 * the number of updated regions are half of num_clips given, 399 * where the clip rects are paired in src and dst. The width and 400 * height of each one of the pairs must match. 401 * 402 * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller 403 * promises that the region specified of the clip rects is filled 404 * completely with a single color as given in the color argument. 405 */ 406 407 struct drm_mode_fb_dirty_cmd { 408 __u32 fb_id; 409 __u32 flags; 410 __u32 color; 411 __u32 num_clips; 412 __u64 clips_ptr; 413 }; 414 415 struct drm_mode_mode_cmd { 416 __u32 connector_id; 417 struct drm_mode_modeinfo mode; 418 }; 419 420 #define DRM_MODE_CURSOR_BO (1<<0) 421 #define DRM_MODE_CURSOR_MOVE (1<<1) 422 423 /* 424 * depending on the value in flags diffrent members are used. 425 * 426 * CURSOR_BO uses 427 * crtc 428 * width 429 * height 430 * handle - if 0 turns the cursor of 431 * 432 * CURSOR_MOVE uses 433 * crtc 434 * x 435 * y 436 */ 437 struct drm_mode_cursor { 438 __u32 flags; 439 __u32 crtc_id; 440 __s32 x; 441 __s32 y; 442 __u32 width; 443 __u32 height; 444 /* driver specific handle */ 445 __u32 handle; 446 }; 447 448 struct drm_mode_cursor2 { 449 __u32 flags; 450 __u32 crtc_id; 451 __s32 x; 452 __s32 y; 453 __u32 width; 454 __u32 height; 455 /* driver specific handle */ 456 __u32 handle; 457 __s32 hot_x; 458 __s32 hot_y; 459 }; 460 461 struct drm_mode_crtc_lut { 462 __u32 crtc_id; 463 __u32 gamma_size; 464 465 /* pointers to arrays */ 466 __u64 red; 467 __u64 green; 468 __u64 blue; 469 }; 470 471 #define DRM_MODE_PAGE_FLIP_EVENT 0x01 472 #define DRM_MODE_PAGE_FLIP_ASYNC 0x02 473 #define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT|DRM_MODE_PAGE_FLIP_ASYNC) 474 475 /* 476 * Request a page flip on the specified crtc. 477 * 478 * This ioctl will ask KMS to schedule a page flip for the specified 479 * crtc. Once any pending rendering targeting the specified fb (as of 480 * ioctl time) has completed, the crtc will be reprogrammed to display 481 * that fb after the next vertical refresh. The ioctl returns 482 * immediately, but subsequent rendering to the current fb will block 483 * in the execbuffer ioctl until the page flip happens. If a page 484 * flip is already pending as the ioctl is called, EBUSY will be 485 * returned. 486 * 487 * The ioctl supports one flag, DRM_MODE_PAGE_FLIP_EVENT, which will 488 * request that drm sends back a vblank event (see drm.h: struct 489 * drm_event_vblank) when the page flip is done. The user_data field 490 * passed in with this ioctl will be returned as the user_data field 491 * in the vblank event struct. 492 * 493 * The reserved field must be zero until we figure out something 494 * clever to use it for. 495 */ 496 497 struct drm_mode_crtc_page_flip { 498 __u32 crtc_id; 499 __u32 fb_id; 500 __u32 flags; 501 __u32 reserved; 502 __u64 user_data; 503 }; 504 505 /* create a dumb scanout buffer */ 506 struct drm_mode_create_dumb { 507 __u32 height; 508 __u32 width; 509 __u32 bpp; 510 __u32 flags; 511 /* handle, pitch, size will be returned */ 512 __u32 handle; 513 __u32 pitch; 514 __u64 size; 515 }; 516 517 /* set up for mmap of a dumb scanout buffer */ 518 struct drm_mode_map_dumb { 519 /** Handle for the object being mapped. */ 520 __u32 handle; 521 __u32 pad; 522 /** 523 * Fake offset to use for subsequent mmap call 524 * 525 * This is a fixed-size type for 32/64 compatibility. 526 */ 527 __u64 offset; 528 }; 529 530 struct drm_mode_destroy_dumb { 531 __u32 handle; 532 }; 533 534 /* page-flip flags are valid, plus: */ 535 #define DRM_MODE_ATOMIC_TEST_ONLY 0x0100 536 #define DRM_MODE_ATOMIC_NONBLOCK 0x0200 537 #define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400 538 539 #define DRM_MODE_ATOMIC_FLAGS (\ 540 DRM_MODE_PAGE_FLIP_EVENT |\ 541 DRM_MODE_PAGE_FLIP_ASYNC |\ 542 DRM_MODE_ATOMIC_TEST_ONLY |\ 543 DRM_MODE_ATOMIC_NONBLOCK |\ 544 DRM_MODE_ATOMIC_ALLOW_MODESET) 545 546 struct drm_mode_atomic { 547 __u32 flags; 548 __u32 count_objs; 549 __u64 objs_ptr; 550 __u64 count_props_ptr; 551 __u64 props_ptr; 552 __u64 prop_values_ptr; 553 __u64 reserved; 554 __u64 user_data; 555 }; 556 557 /** 558 * Create a new 'blob' data property, copying length bytes from data pointer, 559 * and returning new blob ID. 560 */ 561 struct drm_mode_create_blob { 562 /** Pointer to data to copy. */ 563 __u64 data; 564 /** Length of data to copy. */ 565 __u32 length; 566 /** Return: new property ID. */ 567 __u32 blob_id; 568 }; 569 570 /** 571 * Destroy a user-created blob property. 572 */ 573 struct drm_mode_destroy_blob { 574 __u32 blob_id; 575 }; 576 577 578 #endif 579
