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      1 //===-- MipsRegisterInfo.h - Mips Register Information Impl -----*- C++ -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file contains the Mips implementation of the TargetRegisterInfo class.
     11 //
     12 //===----------------------------------------------------------------------===//
     13 
     14 #ifndef LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
     15 #define LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
     16 
     17 #include "Mips.h"
     18 #include "llvm/Target/TargetRegisterInfo.h"
     19 
     20 #define GET_REGINFO_HEADER
     21 #include "MipsGenRegisterInfo.inc"
     22 
     23 namespace llvm {
     24 class MipsRegisterInfo : public MipsGenRegisterInfo {
     25 public:
     26   MipsRegisterInfo();
     27 
     28   /// getRegisterNumbering - Given the enum value for some register, e.g.
     29   /// Mips::RA, return the number that it corresponds to (e.g. 31).
     30   static unsigned getRegisterNumbering(unsigned RegEnum);
     31 
     32   /// Get PIC indirect call register
     33   static unsigned getPICCallReg();
     34 
     35   /// Adjust the Mips stack frame.
     36   void adjustMipsStackFrame(MachineFunction &MF) const;
     37 
     38   /// Code Generation virtual methods...
     39   const TargetRegisterClass *getPointerRegClass(const MachineFunction &MF,
     40                                                 unsigned Kind) const override;
     41 
     42   unsigned getRegPressureLimit(const TargetRegisterClass *RC,
     43                                MachineFunction &MF) const override;
     44   const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
     45   const uint32_t *getCallPreservedMask(const MachineFunction &MF,
     46                                        CallingConv::ID) const override;
     47   static const uint32_t *getMips16RetHelperMask();
     48 
     49   BitVector getReservedRegs(const MachineFunction &MF) const override;
     50 
     51   bool requiresRegisterScavenging(const MachineFunction &MF) const override;
     52 
     53   bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override;
     54 
     55   /// Stack Frame Processing Methods
     56   void eliminateFrameIndex(MachineBasicBlock::iterator II,
     57                            int SPAdj, unsigned FIOperandNum,
     58                            RegScavenger *RS = nullptr) const override;
     59 
     60   void processFunctionBeforeFrameFinalized(MachineFunction &MF,
     61                                        RegScavenger *RS = nullptr) const;
     62 
     63   // Stack realignment queries.
     64   bool canRealignStack(const MachineFunction &MF) const override;
     65 
     66   /// Debug information queries.
     67   unsigned getFrameRegister(const MachineFunction &MF) const override;
     68 
     69   /// \brief Return GPR register class.
     70   virtual const TargetRegisterClass *intRegClass(unsigned Size) const = 0;
     71 
     72 private:
     73   virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
     74                            int FrameIndex, uint64_t StackSize,
     75                            int64_t SPOffset) const = 0;
     76 };
     77 
     78 } // end namespace llvm
     79 
     80 #endif
     81