1 ; RUN: opt %s -O2 -S | FileCheck %s 2 3 ; Check that llvm.x86.avx2.gather.d.ps.256 intrinsic is not eliminated as gather and store memory accesses are based on arr.ptr 4 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 5 target triple = "x86_64-unknown-linux-gnu" 6 7 ; Function Attrs: nounwind readonly 8 declare <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float>, i8*, <8 x i32>, <8 x float>, i8) #0 9 10 ; Function Attrs: nounwind 11 define <8 x float> @foo1(i8* noalias readonly %arr.ptr, <8 x i32>* noalias readonly %vix.ptr, i8* noalias %t2.ptr) #1 { 12 allocas: 13 %vix = load <8 x i32>, <8 x i32>* %vix.ptr, align 4 14 %t1.ptr = getelementptr i8, i8* %arr.ptr, i8 4 15 16 %v1 = tail call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> undef, i8* %arr.ptr, <8 x i32> %vix, <8 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, i8 1) #2 17 store i8 1, i8* %t1.ptr, align 4 18 19 %v2 = tail call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> undef, i8* %arr.ptr, <8 x i32> %vix, <8 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, i8 1) #2 20 %res = fadd <8 x float> %v1, %v2 21 22 ret <8 x float> %res 23 } 24 ; CHECK: foo1 25 ; CHECK: llvm.x86.avx2.gather.d.ps.256 26 ; CHECK: store 27 ; CHECK: llvm.x86.avx2.gather.d.ps.256 28 29 ; Check that second gather is eliminated as gather and store memory accesses are based on different no-aliasing pointers 30 31 ; Function Attrs: nounwind 32 define <8 x float> @foo2(i8* noalias readonly %arr.ptr, <8 x i32>* noalias readonly %vix.ptr, i8* noalias %t2.ptr) #1 { 33 allocas: 34 %vix = load <8 x i32>, <8 x i32>* %vix.ptr, align 4 35 %t1.ptr = getelementptr i8, i8* %arr.ptr, i8 4 36 37 %v1 = tail call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> undef, i8* %arr.ptr, <8 x i32> %vix, <8 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, i8 1) #2 38 store i8 1, i8* %t2.ptr, align 4 39 40 %v2 = tail call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> undef, i8* %arr.ptr, <8 x i32> %vix, <8 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, i8 1) #2 41 %res = fadd <8 x float> %v1, %v2 42 43 ret <8 x float> %res 44 } 45 ; CHECK: foo2 46 ; CHECK: llvm.x86.avx2.gather.d.ps.256 47 ; CHECK: store 48 ; CHECK-NOT: llvm.x86.avx2.gather.d.ps.256 49 50 attributes #0 = { nounwind readonly } 51 attributes #1 = { nounwind "target-cpu"="corei7-avx" "target-features"="+avx2,+popcnt,+cmov,+f16c,+rdrnd,+fma" } 52 attributes #2 = { nounwind } 53 54
