1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 3 ; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s 4 5 declare i32 @llvm.cttz.i32(i32, i1) nounwind readnone 6 declare <2 x i32> @llvm.cttz.v2i32(<2 x i32>, i1) nounwind readnone 7 declare <4 x i32> @llvm.cttz.v4i32(<4 x i32>, i1) nounwind readnone 8 9 ; FUNC-LABEL: {{^}}s_cttz_zero_undef_i32: 10 ; SI: s_load_dword [[VAL:s[0-9]+]], 11 ; SI: s_ff1_i32_b32 [[SRESULT:s[0-9]+]], [[VAL]] 12 ; SI: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]] 13 ; SI: buffer_store_dword [[VRESULT]], 14 ; SI: s_endpgm 15 ; EG: MEM_RAT_CACHELESS STORE_RAW [[RESULT:T[0-9]+\.[XYZW]]] 16 ; EG: FFBL_INT {{\*? *}}[[RESULT]] 17 define void @s_cttz_zero_undef_i32(i32 addrspace(1)* noalias %out, i32 %val) nounwind { 18 %cttz = call i32 @llvm.cttz.i32(i32 %val, i1 true) nounwind readnone 19 store i32 %cttz, i32 addrspace(1)* %out, align 4 20 ret void 21 } 22 23 ; FUNC-LABEL: {{^}}v_cttz_zero_undef_i32: 24 ; SI: buffer_load_dword [[VAL:v[0-9]+]], 25 ; SI: v_ffbl_b32_e32 [[RESULT:v[0-9]+]], [[VAL]] 26 ; SI: buffer_store_dword [[RESULT]], 27 ; SI: s_endpgm 28 ; EG: MEM_RAT_CACHELESS STORE_RAW [[RESULT:T[0-9]+\.[XYZW]]] 29 ; EG: FFBL_INT {{\*? *}}[[RESULT]] 30 define void @v_cttz_zero_undef_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) nounwind { 31 %val = load i32, i32 addrspace(1)* %valptr, align 4 32 %cttz = call i32 @llvm.cttz.i32(i32 %val, i1 true) nounwind readnone 33 store i32 %cttz, i32 addrspace(1)* %out, align 4 34 ret void 35 } 36 37 ; FUNC-LABEL: {{^}}v_cttz_zero_undef_v2i32: 38 ; SI: buffer_load_dwordx2 39 ; SI: v_ffbl_b32_e32 40 ; SI: v_ffbl_b32_e32 41 ; SI: buffer_store_dwordx2 42 ; SI: s_endpgm 43 ; EG: MEM_RAT_CACHELESS STORE_RAW [[RESULT:T[0-9]+]]{{\.[XYZW]}} 44 ; EG: FFBL_INT {{\*? *}}[[RESULT]] 45 ; EG: FFBL_INT {{\*? *}}[[RESULT]] 46 define void @v_cttz_zero_undef_v2i32(<2 x i32> addrspace(1)* noalias %out, <2 x i32> addrspace(1)* noalias %valptr) nounwind { 47 %val = load <2 x i32>, <2 x i32> addrspace(1)* %valptr, align 8 48 %cttz = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %val, i1 true) nounwind readnone 49 store <2 x i32> %cttz, <2 x i32> addrspace(1)* %out, align 8 50 ret void 51 } 52 53 ; FUNC-LABEL: {{^}}v_cttz_zero_undef_v4i32: 54 ; SI: buffer_load_dwordx4 55 ; SI: v_ffbl_b32_e32 56 ; SI: v_ffbl_b32_e32 57 ; SI: v_ffbl_b32_e32 58 ; SI: v_ffbl_b32_e32 59 ; SI: buffer_store_dwordx4 60 ; SI: s_endpgm 61 ; EG: MEM_RAT_CACHELESS STORE_RAW [[RESULT:T[0-9]+]]{{\.[XYZW]}} 62 ; EG: FFBL_INT {{\*? *}}[[RESULT]] 63 ; EG: FFBL_INT {{\*? *}}[[RESULT]] 64 ; EG: FFBL_INT {{\*? *}}[[RESULT]] 65 ; EG: FFBL_INT {{\*? *}}[[RESULT]] 66 define void @v_cttz_zero_undef_v4i32(<4 x i32> addrspace(1)* noalias %out, <4 x i32> addrspace(1)* noalias %valptr) nounwind { 67 %val = load <4 x i32>, <4 x i32> addrspace(1)* %valptr, align 16 68 %cttz = call <4 x i32> @llvm.cttz.v4i32(<4 x i32> %val, i1 true) nounwind readnone 69 store <4 x i32> %cttz, <4 x i32> addrspace(1)* %out, align 16 70 ret void 71 } 72
