1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s 3 4 declare float @llvm.maxnum.f32(float, float) nounwind readnone 5 6 ; SI-LABEL: {{^}}test_fmax3_olt_0: 7 ; SI: buffer_load_dword [[REGC:v[0-9]+]] 8 ; SI: buffer_load_dword [[REGB:v[0-9]+]] 9 ; SI: buffer_load_dword [[REGA:v[0-9]+]] 10 ; SI: v_max3_f32 [[RESULT:v[0-9]+]], [[REGC]], [[REGB]], [[REGA]] 11 ; SI: buffer_store_dword [[RESULT]], 12 ; SI: s_endpgm 13 define void @test_fmax3_olt_0(float addrspace(1)* %out, float addrspace(1)* %aptr, float addrspace(1)* %bptr, float addrspace(1)* %cptr) nounwind { 14 %a = load float, float addrspace(1)* %aptr, align 4 15 %b = load float, float addrspace(1)* %bptr, align 4 16 %c = load float, float addrspace(1)* %cptr, align 4 17 %f0 = call float @llvm.maxnum.f32(float %a, float %b) nounwind readnone 18 %f1 = call float @llvm.maxnum.f32(float %f0, float %c) nounwind readnone 19 store float %f1, float addrspace(1)* %out, align 4 20 ret void 21 } 22 23 ; Commute operand of second fmax 24 ; SI-LABEL: {{^}}test_fmax3_olt_1: 25 ; SI: buffer_load_dword [[REGB:v[0-9]+]] 26 ; SI: buffer_load_dword [[REGA:v[0-9]+]] 27 ; SI: buffer_load_dword [[REGC:v[0-9]+]] 28 ; SI: v_max3_f32 [[RESULT:v[0-9]+]], [[REGC]], [[REGB]], [[REGA]] 29 ; SI: buffer_store_dword [[RESULT]], 30 ; SI: s_endpgm 31 define void @test_fmax3_olt_1(float addrspace(1)* %out, float addrspace(1)* %aptr, float addrspace(1)* %bptr, float addrspace(1)* %cptr) nounwind { 32 %a = load float, float addrspace(1)* %aptr, align 4 33 %b = load float, float addrspace(1)* %bptr, align 4 34 %c = load float, float addrspace(1)* %cptr, align 4 35 %f0 = call float @llvm.maxnum.f32(float %a, float %b) nounwind readnone 36 %f1 = call float @llvm.maxnum.f32(float %c, float %f0) nounwind readnone 37 store float %f1, float addrspace(1)* %out, align 4 38 ret void 39 } 40
