1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s 3 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s 4 5 declare float @llvm.minnum.f32(float, float) nounwind readnone 6 7 ; SI-LABEL: {{^}}test_fmin3_olt_0: 8 ; SI: buffer_load_dword [[REGC:v[0-9]+]] 9 ; SI: buffer_load_dword [[REGB:v[0-9]+]] 10 ; SI: buffer_load_dword [[REGA:v[0-9]+]] 11 ; SI: v_min3_f32 [[RESULT:v[0-9]+]], [[REGC]], [[REGB]], [[REGA]] 12 ; SI: buffer_store_dword [[RESULT]], 13 ; SI: s_endpgm 14 define void @test_fmin3_olt_0(float addrspace(1)* %out, float addrspace(1)* %aptr, float addrspace(1)* %bptr, float addrspace(1)* %cptr) nounwind { 15 %a = load float, float addrspace(1)* %aptr, align 4 16 %b = load float, float addrspace(1)* %bptr, align 4 17 %c = load float, float addrspace(1)* %cptr, align 4 18 %f0 = call float @llvm.minnum.f32(float %a, float %b) nounwind readnone 19 %f1 = call float @llvm.minnum.f32(float %f0, float %c) nounwind readnone 20 store float %f1, float addrspace(1)* %out, align 4 21 ret void 22 } 23 24 ; Commute operand of second fmin 25 ; SI-LABEL: {{^}}test_fmin3_olt_1: 26 ; SI: buffer_load_dword [[REGB:v[0-9]+]] 27 ; SI: buffer_load_dword [[REGA:v[0-9]+]] 28 ; SI: buffer_load_dword [[REGC:v[0-9]+]] 29 ; SI: v_min3_f32 [[RESULT:v[0-9]+]], [[REGC]], [[REGB]], [[REGA]] 30 ; SI: buffer_store_dword [[RESULT]], 31 ; SI: s_endpgm 32 define void @test_fmin3_olt_1(float addrspace(1)* %out, float addrspace(1)* %aptr, float addrspace(1)* %bptr, float addrspace(1)* %cptr) nounwind { 33 %a = load float, float addrspace(1)* %aptr, align 4 34 %b = load float, float addrspace(1)* %bptr, align 4 35 %c = load float, float addrspace(1)* %cptr, align 4 36 %f0 = call float @llvm.minnum.f32(float %a, float %b) nounwind readnone 37 %f1 = call float @llvm.minnum.f32(float %c, float %f0) nounwind readnone 38 store float %f1, float addrspace(1)* %out, align 4 39 ret void 40 } 41
