1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 3 4 declare i32 @llvm.AMDGPU.flbit.i32(i32) nounwind readnone 5 6 ; FUNC-LABEL: {{^}}s_flbit: 7 ; SI: s_load_dword [[VAL:s[0-9]+]], 8 ; SI: s_flbit_i32 [[SRESULT:s[0-9]+]], [[VAL]] 9 ; SI: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]] 10 ; SI: buffer_store_dword [[VRESULT]], 11 ; SI: s_endpgm 12 define void @s_flbit(i32 addrspace(1)* noalias %out, i32 %val) nounwind { 13 %r = call i32 @llvm.AMDGPU.flbit.i32(i32 %val) nounwind readnone 14 store i32 %r, i32 addrspace(1)* %out, align 4 15 ret void 16 } 17 18 ; FUNC-LABEL: {{^}}v_flbit: 19 ; SI: buffer_load_dword [[VAL:v[0-9]+]], 20 ; SI: v_ffbh_i32_e32 [[RESULT:v[0-9]+]], [[VAL]] 21 ; SI: buffer_store_dword [[RESULT]], 22 ; SI: s_endpgm 23 define void @v_flbit(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) nounwind { 24 %val = load i32, i32 addrspace(1)* %valptr, align 4 25 %r = call i32 @llvm.AMDGPU.flbit.i32(i32 %val) nounwind readnone 26 store i32 %r, i32 addrspace(1)* %out, align 4 27 ret void 28 } 29
