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      1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
      2 ; RUN: llc -march=r600 -mcpu=cayman -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
      3 ; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
      4 ; XUN: llc -march=r600 -mcpu=r600 -verify-machineinstrs < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
      5 ; XUN: llc -march=r600 -mcpu=rv770 -verify-machineinstrs < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
      6 
      7 declare i32 @llvm.AMDGPU.umad24(i32, i32, i32) nounwind readnone
      8 declare i32 @llvm.r600.read.tidig.x() nounwind readnone
      9 
     10 ; FUNC-LABEL: {{^}}test_umad24:
     11 ; SI: v_mad_u32_u24
     12 ; EG: MULADD_UINT24
     13 ; R600: MULLO_UINT
     14 ; R600: ADD_INT
     15 define void @test_umad24(i32 addrspace(1)* %out, i32 %src0, i32 %src1, i32 %src2) nounwind {
     16   %mad = call i32 @llvm.AMDGPU.umad24(i32 %src0, i32 %src1, i32 %src2) nounwind readnone
     17   store i32 %mad, i32 addrspace(1)* %out, align 4
     18   ret void
     19 }
     20 
     21 ; FUNC-LABEL: {{^}}commute_umad24:
     22 ; SI-DAG: buffer_load_dword [[SRC0:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}
     23 ; SI-DAG: buffer_load_dword [[SRC2:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4
     24 ; SI: v_mad_u32_u24 [[RESULT:v[0-9]+]], 4, [[SRC0]], [[SRC2]]
     25 ; SI: buffer_store_dword [[RESULT]]
     26 define void @commute_umad24(i32 addrspace(1)* %out, i32 addrspace(1)* %in) nounwind {
     27   %tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone
     28   %out.gep = getelementptr i32, i32 addrspace(1)* %out, i32 %tid
     29   %src0.gep = getelementptr i32, i32 addrspace(1)* %out, i32 %tid
     30   %src2.gep = getelementptr i32, i32 addrspace(1)* %src0.gep, i32 1
     31 
     32   %src0 = load i32, i32 addrspace(1)* %src0.gep, align 4
     33   %src2 = load i32, i32 addrspace(1)* %src2.gep, align 4
     34   %mad = call i32 @llvm.AMDGPU.umad24(i32 %src0, i32 4, i32 %src2) nounwind readnone
     35   store i32 %mad, i32 addrspace(1)* %out.gep, align 4
     36   ret void
     37 }
     38 
     39