1 ;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s 2 ;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s 3 4 ;CHECK-DAG: image_load {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, -1 5 ;CHECK-DAG: image_load_mip {{v\[[0-9]+:[0-9]+\]}}, 3, 0, 0, 0 6 ;CHECK-DAG: image_load_mip {{v[0-9]+}}, 2, 0, 0, 0 7 ;CHECK-DAG: image_load_mip {{v[0-9]+}}, 1, 0, 0, 0 8 ;CHECK-DAG: image_load_mip {{v[0-9]+}}, 4, 0, 0, 0 9 ;CHECK-DAG: image_load_mip {{v[0-9]+}}, 8, 0, 0, 0 10 ;CHECK-DAG: image_load_mip {{v\[[0-9]+:[0-9]+\]}}, 5, 0, 0, 0 11 ;CHECK-DAG: image_load_mip {{v\[[0-9]+:[0-9]+\]}}, 12, 0, 0, -1 12 ;CHECK-DAG: image_load_mip {{v\[[0-9]+:[0-9]+\]}}, 7, 0, 0, 0 13 ;CHECK-DAG: image_load_mip {{v[0-9]+}}, 8, 0, 0, -1 14 15 define void @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4) { 16 %v1 = insertelement <4 x i32> undef, i32 %a1, i32 0 17 %v2 = insertelement <4 x i32> undef, i32 %a1, i32 1 18 %v3 = insertelement <4 x i32> undef, i32 %a1, i32 2 19 %v4 = insertelement <4 x i32> undef, i32 %a1, i32 3 20 %v5 = insertelement <4 x i32> undef, i32 %a2, i32 0 21 %v6 = insertelement <4 x i32> undef, i32 %a2, i32 1 22 %v10 = insertelement <4 x i32> undef, i32 %a3, i32 1 23 %v11 = insertelement <4 x i32> undef, i32 %a3, i32 2 24 %v15 = insertelement <4 x i32> undef, i32 %a4, i32 2 25 %v16 = insertelement <4 x i32> undef, i32 %a4, i32 3 26 %res1 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v1, 27 <32 x i8> undef, i32 1) 28 %res2 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v2, 29 <32 x i8> undef, i32 2) 30 %res3 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v3, 31 <32 x i8> undef, i32 3) 32 %res4 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v4, 33 <32 x i8> undef, i32 4) 34 %res5 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v5, 35 <32 x i8> undef, i32 5) 36 %res6 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v6, 37 <32 x i8> undef, i32 6) 38 %res10 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v10, 39 <32 x i8> undef, i32 10) 40 %res11 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v11, 41 <32 x i8> undef, i32 11) 42 %res15 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v15, 43 <32 x i8> undef, i32 15) 44 %res16 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v16, 45 <32 x i8> undef, i32 16) 46 %e1 = extractelement <4 x i32> %res1, i32 0 47 %e2 = extractelement <4 x i32> %res2, i32 1 48 %e3 = extractelement <4 x i32> %res3, i32 2 49 %e4 = extractelement <4 x i32> %res4, i32 3 50 %t0 = extractelement <4 x i32> %res5, i32 0 51 %t1 = extractelement <4 x i32> %res5, i32 1 52 %e5 = add i32 %t0, %t1 53 %t2 = extractelement <4 x i32> %res6, i32 0 54 %t3 = extractelement <4 x i32> %res6, i32 2 55 %e6 = add i32 %t2, %t3 56 %t10 = extractelement <4 x i32> %res10, i32 2 57 %t11 = extractelement <4 x i32> %res10, i32 3 58 %e10 = add i32 %t10, %t11 59 %t12 = extractelement <4 x i32> %res11, i32 0 60 %t13 = extractelement <4 x i32> %res11, i32 1 61 %t14 = extractelement <4 x i32> %res11, i32 2 62 %t15 = add i32 %t12, %t13 63 %e11 = add i32 %t14, %t15 64 %t28 = extractelement <4 x i32> %res15, i32 0 65 %t29 = extractelement <4 x i32> %res15, i32 1 66 %t30 = extractelement <4 x i32> %res15, i32 2 67 %t31 = extractelement <4 x i32> %res15, i32 3 68 %t32 = add i32 %t28, %t29 69 %t33 = add i32 %t30, %t31 70 %e15 = add i32 %t32, %t33 71 %e16 = extractelement <4 x i32> %res16, i32 3 72 %s1 = add i32 %e1, %e2 73 %s2 = add i32 %s1, %e3 74 %s3 = add i32 %s2, %e4 75 %s4 = add i32 %s3, %e5 76 %s5 = add i32 %s4, %e6 77 %s9 = add i32 %s5, %e10 78 %s10 = add i32 %s9, %e11 79 %s14 = add i32 %s10, %e15 80 %s15 = add i32 %s14, %e16 81 %s16 = bitcast i32 %s15 to float 82 call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %s16, float %s16, float %s16, float %s16) 83 ret void 84 } 85 86 ; Test that ccordinates are stored in vgprs and not sgprs 87 ; CHECK: vgpr_coords 88 ; CHECK: image_load_mip {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}} 89 define void @vgpr_coords(float addrspace(2)* addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 { 90 main_body: 91 %20 = getelementptr float addrspace(2)*, float addrspace(2)* addrspace(2)* %0, i32 0 92 %21 = load float addrspace(2)*, float addrspace(2)* addrspace(2)* %20, !tbaa !2 93 %22 = getelementptr float, float addrspace(2)* %21, i32 0 94 %23 = load float, float addrspace(2)* %22, !tbaa !2, !invariant.load !1 95 %24 = getelementptr float, float addrspace(2)* %21, i32 1 96 %25 = load float, float addrspace(2)* %24, !tbaa !2, !invariant.load !1 97 %26 = getelementptr float, float addrspace(2)* %21, i32 4 98 %27 = load float, float addrspace(2)* %26, !tbaa !2, !invariant.load !1 99 %28 = getelementptr <32 x i8>, <32 x i8> addrspace(2)* %2, i32 0 100 %29 = load <32 x i8>, <32 x i8> addrspace(2)* %28, !tbaa !2 101 %30 = bitcast float %27 to i32 102 %31 = bitcast float %23 to i32 103 %32 = bitcast float %25 to i32 104 %33 = insertelement <4 x i32> undef, i32 %31, i32 0 105 %34 = insertelement <4 x i32> %33, i32 %32, i32 1 106 %35 = insertelement <4 x i32> %34, i32 %30, i32 2 107 %36 = insertelement <4 x i32> %35, i32 undef, i32 3 108 %37 = call <4 x i32> @llvm.SI.imageload.v4i32(<4 x i32> %36, <32 x i8> %29, i32 2) 109 %38 = extractelement <4 x i32> %37, i32 0 110 %39 = extractelement <4 x i32> %37, i32 1 111 %40 = extractelement <4 x i32> %37, i32 2 112 %41 = extractelement <4 x i32> %37, i32 3 113 %42 = bitcast i32 %38 to float 114 %43 = bitcast i32 %39 to float 115 %44 = bitcast i32 %40 to float 116 %45 = bitcast i32 %41 to float 117 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %42, float %43, float %44, float %45) 118 ret void 119 } 120 121 declare <4 x i32> @llvm.SI.imageload.(<4 x i32>, <32 x i8>, i32) readnone 122 ; Function Attrs: nounwind readnone 123 declare <4 x i32> @llvm.SI.imageload.v4i32(<4 x i32>, <32 x i8>, i32) #1 124 125 declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) 126 127 attributes #0 = { "ShaderType"="0" } 128 attributes #1 = { nounwind readnone } 129 130 !0 = !{!"const", null} 131 !1 = !{} 132 !2 = !{!0, !0, i64 0, i32 1} 133
