1 ; Function Attrs: nounwind 2 ; RUN: llc -march=r600 -mcpu=redwood -mattr=-promote-alloca < %s | FileCheck %s 3 ; 4 ; CFG flattening should use parallel-and mode to generate branch conditions and 5 ; then merge if-regions with the same bodies. 6 ; 7 ; CHECK: AND_INT 8 ; CHECK-NEXT: AND_INT 9 ; CHECK-NEXT: OR_INT 10 11 ; FIXME: For some reason having the allocas here allowed the flatten cfg pass 12 ; to do its transfomation, however now that we are using local memory for 13 ; allocas, the transformation isn't happening. 14 15 define void @_Z9chk1D_512v() #0 { 16 entry: 17 %a0 = alloca i32, align 4 18 %b0 = alloca i32, align 4 19 %c0 = alloca i32, align 4 20 %d0 = alloca i32, align 4 21 %a1 = alloca i32, align 4 22 %b1 = alloca i32, align 4 23 %c1 = alloca i32, align 4 24 %d1 = alloca i32, align 4 25 %data = alloca i32, align 4 26 %0 = load i32, i32* %a0, align 4 27 %1 = load i32, i32* %b0, align 4 28 %cmp = icmp ne i32 %0, %1 29 br i1 %cmp, label %land.lhs.true, label %if.end 30 31 land.lhs.true: ; preds = %entry 32 %2 = load i32, i32* %c0, align 4 33 %3 = load i32, i32* %d0, align 4 34 %cmp1 = icmp ne i32 %2, %3 35 br i1 %cmp1, label %if.then, label %if.end 36 37 if.then: ; preds = %land.lhs.true 38 store i32 1, i32* %data, align 4 39 br label %if.end 40 41 if.end: ; preds = %if.then, %land.lhs.true, %entry 42 %4 = load i32, i32* %a1, align 4 43 %5 = load i32, i32* %b1, align 4 44 %cmp2 = icmp ne i32 %4, %5 45 br i1 %cmp2, label %land.lhs.true3, label %if.end6 46 47 land.lhs.true3: ; preds = %if.end 48 %6 = load i32, i32* %c1, align 4 49 %7 = load i32, i32* %d1, align 4 50 %cmp4 = icmp ne i32 %6, %7 51 br i1 %cmp4, label %if.then5, label %if.end6 52 53 if.then5: ; preds = %land.lhs.true3 54 store i32 1, i32* %data, align 4 55 br label %if.end6 56 57 if.end6: ; preds = %if.then5, %land.lhs.true3, %if.end 58 ret void 59 } 60
