1 # RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s 2 # This test ensures that the MIR parser parses the call entry pseudo source 3 # values in memory operands correctly. 4 5 --- | 6 define i32 @test(i32 %a) { 7 entry: 8 %call = call i32 @foo(i32 %a) 9 ret i32 0 10 } 11 12 declare i32 @foo(i32) 13 14 define float @test2() #0 { 15 entry: 16 %call = tail call float bitcast (float (...)* @g to float ()*)() 17 call void @__mips16_ret_sf(float %call) 18 ret float %call 19 } 20 21 declare float @g(...) 22 23 declare void @__mips16_ret_sf(float) #1 24 25 attributes #0 = { "saveS2" } 26 attributes #1 = { noinline readnone "__Mips16RetHelper" } 27 ... 28 --- 29 name: test 30 tracksRegLiveness: true 31 liveins: 32 - { reg: '%a0' } 33 frameInfo: 34 stackSize: 24 35 maxAlignment: 4 36 adjustsStack: true 37 hasCalls: true 38 maxCallFrameSize: 16 39 stack: 40 - { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, 41 callee-saved-register: '%ra' } 42 body: | 43 bb.0.entry: 44 liveins: %a0, %ra 45 46 Save16 %ra, 24, implicit-def %sp, implicit %sp 47 CFI_INSTRUCTION .cfi_def_cfa_offset 24 48 CFI_INSTRUCTION .cfi_offset %ra_64, -4 49 %v0, %v1 = GotPrologue16 $_gp_disp, $_gp_disp 50 %v0 = SllX16 killed %v0, 16 51 %v0 = AdduRxRyRz16 killed %v1, killed %v0 52 ; CHECK-LABEL: name: test 53 ; CHECK: %v1 = LwRxRyOffMemX16 %v0, @foo, 0 :: (load 4 from call-entry @foo) 54 %v1 = LwRxRyOffMemX16 %v0, @foo, 0 :: (load 4 from call-entry @foo) 55 %t9 = COPY %v1 56 %gp = COPY killed %v0 57 JumpLinkReg16 killed %v1, csr_o32, implicit-def %ra, implicit killed %t9, implicit %a0, implicit killed %gp, implicit-def %sp, implicit-def dead %v0 58 %v0 = LiRxImmX16 0 59 %ra = Restore16 24, implicit-def %sp, implicit %sp 60 RetRA16 implicit %v0 61 ... 62 --- 63 name: test2 64 tracksRegLiveness: true 65 frameInfo: 66 stackSize: 32 67 maxAlignment: 4 68 adjustsStack: true 69 hasCalls: true 70 maxCallFrameSize: 16 71 stack: 72 - { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, 73 callee-saved-register: '%ra' } 74 - { id: 1, type: spill-slot, offset: -8, size: 4, alignment: 4, 75 callee-saved-register: '%s2' } 76 - { id: 2, type: spill-slot, offset: -12, size: 4, alignment: 4, 77 callee-saved-register: '%s0' } 78 body: | 79 bb.0.entry: 80 liveins: %ra, %s2, %s0, %ra, %s2, %s0 81 82 SaveX16 %s0, %ra, %s2, 32, implicit-def %sp, implicit %sp 83 CFI_INSTRUCTION .cfi_def_cfa_offset 32 84 CFI_INSTRUCTION .cfi_offset %ra_64, -4 85 CFI_INSTRUCTION .cfi_offset %s2_64, -8 86 CFI_INSTRUCTION .cfi_offset %s0_64, -12 87 %v0, %v1 = GotPrologue16 $_gp_disp, $_gp_disp 88 %v0 = SllX16 killed %v0, 16 89 %s0 = AdduRxRyRz16 killed %v1, killed %v0 90 %v0 = LwRxRyOffMemX16 %s0, @g, 0 :: (load 4 from call-entry @g) 91 ; CHECK-LABEL: test2 92 ; CHECK: %v1 = LwRxRyOffMemX16 %s0, $__mips16_call_stub_sf_0, 0 :: (load 4 from call-entry $__mips16_call_stub_sf_0) 93 %v1 = LwRxRyOffMemX16 %s0, $__mips16_call_stub_sf_0, 0 :: (load 4 from call-entry $__mips16_call_stub_sf_0) 94 %gp = COPY %s0 95 JumpLinkReg16 killed %v1, csr_o32, implicit-def %ra, implicit %v0, implicit killed %gp, implicit-def %sp, implicit-def %v0 96 %v1 = LwRxRyOffMemX16 %s0, @__mips16_ret_sf, 0 :: (load 4 from call-entry @__mips16_ret_sf) 97 %t9 = COPY %v1 98 %gp = COPY killed %s0 99 JumpLinkReg16 killed %v1, csr_mips16rethelper, implicit-def %ra, implicit killed %t9, implicit %v0, implicit killed %gp, implicit-def %sp 100 %s0, %ra, %s2 = RestoreX16 32, implicit-def %sp, implicit %sp 101 RetRA16 implicit %v0 102 ... 103
