1 ; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 < %s | \ 2 ; RUN: FileCheck %s -check-prefix=CHECK-LE 3 ; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | \ 4 ; RUN: FileCheck %s -check-prefix=CHECK-BE 5 6 ; Check for a vector merge instruction using two inputs 7 ; The shufflevector specifies the even elements, using big endian element 8 ; ordering. If run on a big endian machine, this should produce the vmrgew 9 ; instruction. If run on a little endian machine, this should produce the 10 ; vmrgow instruction. Note also that on little endian the input registers 11 ; are swapped also. 12 define void @check_merge_even_xy(<16 x i8>* %A, <16 x i8>* %B) { 13 entry: 14 ; CHECK-LE-LABEL: @check_merge_even_xy 15 ; CHECK-BE-LABEL: @check_merge_even_xy 16 %tmp = load <16 x i8>, <16 x i8>* %A 17 %tmp2 = load <16 x i8>, <16 x i8>* %B 18 %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, 19 <16 x i32> <i32 0, i32 1, i32 2, i32 3, 20 i32 16, i32 17, i32 18, i32 19, 21 i32 8, i32 9, i32 10, i32 11, 22 i32 24, i32 25, i32 26, i32 27> 23 ; CHECK-LE: vmrgow 2, 3, 2 24 ; CHECK-BE: vmrgew 2, 2, 3 25 store <16 x i8> %tmp3, <16 x i8>* %A 26 ret void 27 ; CHECK-LE: blr 28 ; CHECK-BE: blr 29 } 30 31 ; Check for a vector merge instruction using a single input. 32 ; The shufflevector specifies the even elements, using big endian element 33 ; ordering. If run on a big endian machine, this should produce the vmrgew 34 ; instruction. If run on a little endian machine, this should produce the 35 ; vmrgow instruction. 36 define void @check_merge_even_xx(<16 x i8>* %A) { 37 entry: 38 ; CHECK-LE-LABEL: @check_merge_even_xx 39 ; CHECK-BE-LABEL: @check_merge_even_xx 40 %tmp = load <16 x i8>, <16 x i8>* %A 41 %tmp2 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp, 42 <16 x i32> <i32 0, i32 1, i32 2, i32 3, 43 i32 0, i32 1, i32 2, i32 3, 44 i32 8, i32 9, i32 10, i32 11, 45 i32 8, i32 9, i32 10, i32 11> 46 ; CHECK-LE: vmrgow 2, 2, 2 47 ; CHECK-BE: vmrgew 2, 2, 2 48 store <16 x i8> %tmp2, <16 x i8>* %A 49 ret void 50 ; CHECK-LE: blr 51 ; CHECK-BE: blr 52 } 53 54 ; Check for a vector merge instruction using two inputs. 55 ; The shufflevector specifies the odd elements, using big endian element 56 ; ordering. If run on a big endian machine, this should produce the vmrgow 57 ; instruction. If run on a little endian machine, this should produce the 58 ; vmrgew instruction. Note also that on little endian the input registers 59 ; are swapped also. 60 define void @check_merge_odd_xy(<16 x i8>* %A, <16 x i8>* %B) { 61 entry: 62 ; CHECK-LE-LABEL: @check_merge_odd_xy 63 ; CHECK-BE-LABEL: @check_merge_odd_xy 64 %tmp = load <16 x i8>, <16 x i8>* %A 65 %tmp2 = load <16 x i8>, <16 x i8>* %B 66 %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, 67 <16 x i32> <i32 4, i32 5, i32 6, i32 7, 68 i32 20, i32 21, i32 22, i32 23, 69 i32 12, i32 13, i32 14, i32 15, 70 i32 28, i32 29, i32 30, i32 31> 71 ; CHECK-LE: vmrgew 2, 3, 2 72 ; CHECK-BE: vmrgow 2, 2, 3 73 store <16 x i8> %tmp3, <16 x i8>* %A 74 ret void 75 ; CHECK-LE: blr 76 ; CHECK-BE: blr 77 } 78 79 ; Check for a vector merge instruction using a single input. 80 ; The shufflevector specifies the odd elements, using big endian element 81 ; ordering. If run on a big endian machine, this should produce the vmrgow 82 ; instruction. If run on a little endian machine, this should produce the 83 ; vmrgew instruction. 84 define void @check_merge_odd_xx(<16 x i8>* %A) { 85 entry: 86 ; CHECK-LE-LABEL: @check_merge_odd_xx 87 ; CHECK-BE-LABEL: @check_merge_odd_xx 88 %tmp = load <16 x i8>, <16 x i8>* %A 89 %tmp2 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp, 90 <16 x i32> <i32 4, i32 5, i32 6, i32 7, 91 i32 4, i32 5, i32 6, i32 7, 92 i32 12, i32 13, i32 14, i32 15, 93 i32 12, i32 13, i32 14, i32 15> 94 ; CHECK-LE: vmrgew 2, 2, 2 95 ; CHECK-BE: vmrgow 2, 2, 2 96 store <16 x i8> %tmp2, <16 x i8>* %A 97 ret void 98 ; CHECK-LE: blr 99 ; CHECK-BE: blr 100 } 101 102
