1 ; Test the vector rotate and shift doubleword instructions that were added in P8 2 ; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s 3 ; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -mattr=-vsx < %s | FileCheck %s 4 5 declare <2 x i64> @llvm.ppc.altivec.vrld(<2 x i64>, <2 x i64>) nounwind readnone 6 declare <2 x i64> @llvm.ppc.altivec.vsld(<2 x i64>, <2 x i64>) nounwind readnone 7 declare <2 x i64> @llvm.ppc.altivec.vsrd(<2 x i64>, <2 x i64>) nounwind readnone 8 declare <2 x i64> @llvm.ppc.altivec.vsrad(<2 x i64>, <2 x i64>) nounwind readnone 9 10 define <2 x i64> @test_vrld(<2 x i64> %x, <2 x i64> %y) nounwind readnone { 11 %tmp = tail call <2 x i64> @llvm.ppc.altivec.vrld(<2 x i64> %x, <2 x i64> %y) 12 ret <2 x i64> %tmp 13 ; CHECK: vrld 2, 2, 3 14 } 15 16 define <2 x i64> @test_vsld(<2 x i64> %x, <2 x i64> %y) nounwind readnone { 17 %tmp = shl <2 x i64> %x, %y 18 ret <2 x i64> %tmp 19 ; CHECK-LABEL: @test_vsld 20 ; CHECK: vsld 2, 2, 3 21 } 22 23 define <2 x i64> @test_vsrd(<2 x i64> %x, <2 x i64> %y) nounwind readnone { 24 %tmp = lshr <2 x i64> %x, %y 25 ret <2 x i64> %tmp 26 ; CHECK-LABEL: @test_vsrd 27 ; CHECK: vsrd 2, 2, 3 28 } 29 30 define <2 x i64> @test_vsrad(<2 x i64> %x, <2 x i64> %y) nounwind readnone { 31 %tmp = ashr <2 x i64> %x, %y 32 ret <2 x i64> %tmp 33 ; CHECK-LABER: @test_vsrad 34 ; CHECK: vsrad 2, 2, 3 35 } 36 37
