1 ; Test 64-bit atomic XORs, z196 version. 2 ; 3 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s 4 5 ; Check XOR of a variable. 6 define i64 @f1(i64 %dummy, i64 *%src, i64 %b) { 7 ; CHECK-LABEL: f1: 8 ; CHECK: laxg %r2, %r4, 0(%r3) 9 ; CHECK: br %r14 10 %res = atomicrmw xor i64 *%src, i64 %b seq_cst 11 ret i64 %res 12 } 13 14 ; Check XOR of 1, which needs a temporary. 15 define i64 @f2(i64 %dummy, i64 *%src) { 16 ; CHECK-LABEL: f2: 17 ; CHECK: lghi [[TMP:%r[0-5]]], 1 18 ; CHECK: laxg %r2, [[TMP]], 0(%r3) 19 ; CHECK: br %r14 20 %res = atomicrmw xor i64 *%src, i64 1 seq_cst 21 ret i64 %res 22 } 23 24 ; Check the high end of the LAXG range. 25 define i64 @f3(i64 %dummy, i64 *%src, i64 %b) { 26 ; CHECK-LABEL: f3: 27 ; CHECK: laxg %r2, %r4, 524280(%r3) 28 ; CHECK: br %r14 29 %ptr = getelementptr i64, i64 *%src, i64 65535 30 %res = atomicrmw xor i64 *%ptr, i64 %b seq_cst 31 ret i64 %res 32 } 33 34 ; Check the next doubleword up, which needs separate address logic. 35 define i64 @f4(i64 %dummy, i64 *%src, i64 %b) { 36 ; CHECK-LABEL: f4: 37 ; CHECK: agfi %r3, 524288 38 ; CHECK: laxg %r2, %r4, 0(%r3) 39 ; CHECK: br %r14 40 %ptr = getelementptr i64, i64 *%src, i64 65536 41 %res = atomicrmw xor i64 *%ptr, i64 %b seq_cst 42 ret i64 %res 43 } 44 45 ; Check the low end of the LAXG range. 46 define i64 @f5(i64 %dummy, i64 *%src, i64 %b) { 47 ; CHECK-LABEL: f5: 48 ; CHECK: laxg %r2, %r4, -524288(%r3) 49 ; CHECK: br %r14 50 %ptr = getelementptr i64, i64 *%src, i64 -65536 51 %res = atomicrmw xor i64 *%ptr, i64 %b seq_cst 52 ret i64 %res 53 } 54 55 ; Check the next doubleword down, which needs separate address logic. 56 define i64 @f6(i64 %dummy, i64 *%src, i64 %b) { 57 ; CHECK-LABEL: f6: 58 ; CHECK: agfi %r3, -524296 59 ; CHECK: laxg %r2, %r4, 0(%r3) 60 ; CHECK: br %r14 61 %ptr = getelementptr i64, i64 *%src, i64 -65537 62 %res = atomicrmw xor i64 *%ptr, i64 %b seq_cst 63 ret i64 %res 64 } 65
