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      1 ; Test all condition-code masks that are relevant for CGRJ.
      2 ;
      3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
      4 
      5 declare i64 @foo()
      6 
      7 ; Test EQ.
      8 define void @f1(i64 %target) {
      9 ; CHECK-LABEL: f1:
     10 ; CHECK: .cfi_def_cfa_offset
     11 ; CHECK: .L[[LABEL:.*]]:
     12 ; CHECK: cgrje %r2, {{%r[0-9]+}}, .L[[LABEL]]
     13   br label %loop
     14 loop:
     15   %val = call i64 @foo()
     16   %cond = icmp eq i64 %val, %target
     17   br i1 %cond, label %loop, label %exit
     18 exit:
     19   ret void
     20 }
     21 
     22 ; Test NE.
     23 define void @f2(i64 %target) {
     24 ; CHECK-LABEL: f2:
     25 ; CHECK: .cfi_def_cfa_offset
     26 ; CHECK: .L[[LABEL:.*]]:
     27 ; CHECK: cgrjlh %r2, {{%r[0-9]+}}, .L[[LABEL]]
     28   br label %loop
     29 loop:
     30   %val = call i64 @foo()
     31   %cond = icmp ne i64 %val, %target
     32   br i1 %cond, label %loop, label %exit
     33 exit:
     34   ret void
     35 }
     36 
     37 ; Test SLE.
     38 define void @f3(i64 %target) {
     39 ; CHECK-LABEL: f3:
     40 ; CHECK: .cfi_def_cfa_offset
     41 ; CHECK: .L[[LABEL:.*]]:
     42 ; CHECK: cgrjle %r2, {{%r[0-9]+}}, .L[[LABEL]]
     43   br label %loop
     44 loop:
     45   %val = call i64 @foo()
     46   %cond = icmp sle i64 %val, %target
     47   br i1 %cond, label %loop, label %exit
     48 exit:
     49   ret void
     50 }
     51 
     52 ; Test SLT.
     53 define void @f4(i64 %target) {
     54 ; CHECK-LABEL: f4:
     55 ; CHECK: .cfi_def_cfa_offset
     56 ; CHECK: .L[[LABEL:.*]]:
     57 ; CHECK: cgrjl %r2, {{%r[0-9]+}}, .L[[LABEL]]
     58   br label %loop
     59 loop:
     60   %val = call i64 @foo()
     61   %cond = icmp slt i64 %val, %target
     62   br i1 %cond, label %loop, label %exit
     63 exit:
     64   ret void
     65 }
     66 
     67 ; Test SGT.
     68 define void @f5(i64 %target) {
     69 ; CHECK-LABEL: f5:
     70 ; CHECK: .cfi_def_cfa_offset
     71 ; CHECK: .L[[LABEL:.*]]:
     72 ; CHECK: cgrjh %r2, {{%r[0-9]+}}, .L[[LABEL]]
     73   br label %loop
     74 loop:
     75   %val = call i64 @foo()
     76   %cond = icmp sgt i64 %val, %target
     77   br i1 %cond, label %loop, label %exit
     78 exit:
     79   ret void
     80 }
     81 
     82 ; Test SGE.
     83 define void @f6(i64 %target) {
     84 ; CHECK-LABEL: f6:
     85 ; CHECK: .cfi_def_cfa_offset
     86 ; CHECK: .L[[LABEL:.*]]:
     87 ; CHECK: cgrjhe %r2, {{%r[0-9]+}}, .L[[LABEL]]
     88   br label %loop
     89 loop:
     90   %val = call i64 @foo()
     91   %cond = icmp sge i64 %val, %target
     92   br i1 %cond, label %loop, label %exit
     93 exit:
     94   ret void
     95 }
     96 
     97 ; Test a vector of 0/-1 results for i32 EQ.
     98 define i64 @f7(i64 %a, i64 %b) {
     99 ; CHECK-LABEL: f7:
    100 ; CHECK: ipm [[REG:%r[0-5]]]
    101 ; CHECK: afi [[REG]], -268435456
    102 ; CHECK: sra [[REG]], 31
    103 ; CHECK: br %r14
    104   %avec = bitcast i64 %a to <2 x i32>
    105   %bvec = bitcast i64 %b to <2 x i32>
    106   %cmp = icmp eq <2 x i32> %avec, %bvec
    107   %ext = sext <2 x i1> %cmp to <2 x i32>
    108   %ret = bitcast <2 x i32> %ext to i64
    109   ret i64 %ret
    110 }
    111 
    112 ; Test a vector of 0/-1 results for i32 NE.
    113 define i64 @f8(i64 %a, i64 %b) {
    114 ; CHECK-LABEL: f8:
    115 ; CHECK: ipm [[REG:%r[0-5]]]
    116 ; CHECK: afi [[REG]], 1879048192
    117 ; CHECK: sra [[REG]], 31
    118 ; CHECK: br %r14
    119   %avec = bitcast i64 %a to <2 x i32>
    120   %bvec = bitcast i64 %b to <2 x i32>
    121   %cmp = icmp ne <2 x i32> %avec, %bvec
    122   %ext = sext <2 x i1> %cmp to <2 x i32>
    123   %ret = bitcast <2 x i32> %ext to i64
    124   ret i64 %ret
    125 }
    126 
    127 ; Test a vector of 0/-1 results for i64 EQ.
    128 define void @f9(i64 %a, i64 %b, <2 x i64> *%dest) {
    129 ; CHECK-LABEL: f9:
    130 ; CHECK: ipm [[REG:%r[0-5]]]
    131 ; CHECK: afi [[REG]], -268435456
    132 ; CHECK: sllg [[REG2:%r[0-5]]], [[REG]], 32
    133 ; CHECK: srag {{%r[0-5]}}, [[REG2]], 63
    134 ; CHECK: br %r14
    135   %avec = bitcast i64 %a to <2 x i32>
    136   %bvec = bitcast i64 %b to <2 x i32>
    137   %cmp = icmp eq <2 x i32> %avec, %bvec
    138   %ext = sext <2 x i1> %cmp to <2 x i64>
    139   store <2 x i64> %ext, <2 x i64> *%dest
    140   ret void
    141 }
    142 
    143 ; Test a vector of 0/-1 results for i64 NE.
    144 define void @f10(i64 %a, i64 %b, <2 x i64> *%dest) {
    145 ; CHECK-LABEL: f10:
    146 ; CHECK: ipm [[REG:%r[0-5]]]
    147 ; CHECK: afi [[REG]], 1879048192
    148 ; CHECK: sllg [[REG2:%r[0-5]]], [[REG]], 32
    149 ; CHECK: srag {{%r[0-5]}}, [[REG2]], 63
    150 ; CHECK: br %r14
    151   %avec = bitcast i64 %a to <2 x i32>
    152   %bvec = bitcast i64 %b to <2 x i32>
    153   %cmp = icmp ne <2 x i32> %avec, %bvec
    154   %ext = sext <2 x i1> %cmp to <2 x i64>
    155   store <2 x i64> %ext, <2 x i64> *%dest
    156   ret void
    157 }
    158