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      1 ; Test 64-bit byteswaps from registers to memory.
      2 ;
      3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
      4 
      5 declare i64 @llvm.bswap.i64(i64 %a)
      6 
      7 ; Check STRVG with no displacement.
      8 define void @f1(i64 *%dst, i64 %a) {
      9 ; CHECK-LABEL: f1:
     10 ; CHECK: strvg %r3, 0(%r2)
     11 ; CHECK: br %r14
     12   %swapped = call i64 @llvm.bswap.i64(i64 %a)
     13   store i64 %swapped, i64 *%dst
     14   ret void
     15 }
     16 
     17 ; Check the high end of the aligned STRVG range.
     18 define void @f2(i64 *%dst, i64 %a) {
     19 ; CHECK-LABEL: f2:
     20 ; CHECK: strvg %r3, 524280(%r2)
     21 ; CHECK: br %r14
     22   %ptr = getelementptr i64, i64 *%dst, i64 65535
     23   %swapped = call i64 @llvm.bswap.i64(i64 %a)
     24   store i64 %swapped, i64 *%ptr
     25   ret void
     26 }
     27 
     28 ; Check the next doubleword up, which needs separate address logic.
     29 ; Other sequences besides this one would be OK.
     30 define void @f3(i64 *%dst, i64 %a) {
     31 ; CHECK-LABEL: f3:
     32 ; CHECK: agfi %r2, 524288
     33 ; CHECK: strvg %r3, 0(%r2)
     34 ; CHECK: br %r14
     35   %ptr = getelementptr i64, i64 *%dst, i64 65536
     36   %swapped = call i64 @llvm.bswap.i64(i64 %a)
     37   store i64 %swapped, i64 *%ptr
     38   ret void
     39 }
     40 
     41 ; Check the high end of the negative aligned STRVG range.
     42 define void @f4(i64 *%dst, i64 %a) {
     43 ; CHECK-LABEL: f4:
     44 ; CHECK: strvg %r3, -8(%r2)
     45 ; CHECK: br %r14
     46   %ptr = getelementptr i64, i64 *%dst, i64 -1
     47   %swapped = call i64 @llvm.bswap.i64(i64 %a)
     48   store i64 %swapped, i64 *%ptr
     49   ret void
     50 }
     51 
     52 ; Check the low end of the STRVG range.
     53 define void @f5(i64 *%dst, i64 %a) {
     54 ; CHECK-LABEL: f5:
     55 ; CHECK: strvg %r3, -524288(%r2)
     56 ; CHECK: br %r14
     57   %ptr = getelementptr i64, i64 *%dst, i64 -65536
     58   %swapped = call i64 @llvm.bswap.i64(i64 %a)
     59   store i64 %swapped, i64 *%ptr
     60   ret void
     61 }
     62 
     63 ; Check the next doubleword down, which needs separate address logic.
     64 ; Other sequences besides this one would be OK.
     65 define void @f6(i64 *%dst, i64 %a) {
     66 ; CHECK-LABEL: f6:
     67 ; CHECK: agfi %r2, -524296
     68 ; CHECK: strvg %r3, 0(%r2)
     69 ; CHECK: br %r14
     70   %ptr = getelementptr i64, i64 *%dst, i64 -65537
     71   %swapped = call i64 @llvm.bswap.i64(i64 %a)
     72   store i64 %swapped, i64 *%ptr
     73   ret void
     74 }
     75 
     76 ; Check that STRVG allows an index.
     77 define void @f7(i64 %src, i64 %index, i64 %a) {
     78 ; CHECK-LABEL: f7:
     79 ; CHECK: strvg %r4, 524287({{%r3,%r2|%r2,%r3}})
     80 ; CHECK: br %r14
     81   %add1 = add i64 %src, %index
     82   %add2 = add i64 %add1, 524287
     83   %ptr = inttoptr i64 %add2 to i64 *
     84   %swapped = call i64 @llvm.bswap.i64(i64 %a)
     85   store i64 %swapped, i64 *%ptr
     86   ret void
     87 }
     88 
     89 ; Check that volatile stores do not use STRVG, which might access the
     90 ; storage multple times.
     91 define void @f8(i64 *%dst, i64 %a) {
     92 ; CHECK-LABEL: f8:
     93 ; CHECK: lrvgr [[REG:%r[0-5]]], %r3
     94 ; CHECK: stg [[REG]], 0(%r2)
     95 ; CHECK: br %r14
     96   %swapped = call i64 @llvm.bswap.i64(i64 %a)
     97   store volatile i64 %swapped, i64 *%dst
     98   ret void
     99 }
    100