1 ; Test zero extensions from a halfword to an i32. The tests here 2 ; assume z10 register pressure, without the high words being available. 3 ; 4 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s 5 6 ; Test register extension, starting with an i32. 7 define i32 @f1(i32 %a) { 8 ; CHECK-LABEL: f1: 9 ; CHECK: llhr %r2, %r2 10 ; CHECK: br %r14 11 %half = trunc i32 %a to i16 12 %ext = zext i16 %half to i32 13 ret i32 %ext 14 } 15 16 ; ...and again with an i64. 17 define i32 @f2(i64 %a) { 18 ; CHECK-LABEL: f2: 19 ; CHECK: llhr %r2, %r2 20 ; CHECK: br %r14 21 %half = trunc i64 %a to i16 22 %ext = zext i16 %half to i32 23 ret i32 %ext 24 } 25 26 ; Check ANDs that are equivalent to zero extension. 27 define i32 @f3(i32 %a) { 28 ; CHECK-LABEL: f3: 29 ; CHECK: llhr %r2, %r2 30 ; CHECK: br %r14 31 %ext = and i32 %a, 65535 32 ret i32 %ext 33 } 34 35 ; Check LLH with no displacement. 36 define i32 @f4(i16 *%src) { 37 ; CHECK-LABEL: f4: 38 ; CHECK: llh %r2, 0(%r2) 39 ; CHECK: br %r14 40 %half = load i16 , i16 *%src 41 %ext = zext i16 %half to i32 42 ret i32 %ext 43 } 44 45 ; Check the high end of the LLH range. 46 define i32 @f5(i16 *%src) { 47 ; CHECK-LABEL: f5: 48 ; CHECK: llh %r2, 524286(%r2) 49 ; CHECK: br %r14 50 %ptr = getelementptr i16, i16 *%src, i64 262143 51 %half = load i16 , i16 *%ptr 52 %ext = zext i16 %half to i32 53 ret i32 %ext 54 } 55 56 ; Check the next halfword up, which needs separate address logic. 57 ; Other sequences besides this one would be OK. 58 define i32 @f6(i16 *%src) { 59 ; CHECK-LABEL: f6: 60 ; CHECK: agfi %r2, 524288 61 ; CHECK: llh %r2, 0(%r2) 62 ; CHECK: br %r14 63 %ptr = getelementptr i16, i16 *%src, i64 262144 64 %half = load i16 , i16 *%ptr 65 %ext = zext i16 %half to i32 66 ret i32 %ext 67 } 68 69 ; Check the high end of the negative LLH range. 70 define i32 @f7(i16 *%src) { 71 ; CHECK-LABEL: f7: 72 ; CHECK: llh %r2, -2(%r2) 73 ; CHECK: br %r14 74 %ptr = getelementptr i16, i16 *%src, i64 -1 75 %half = load i16 , i16 *%ptr 76 %ext = zext i16 %half to i32 77 ret i32 %ext 78 } 79 80 ; Check the low end of the LLH range. 81 define i32 @f8(i16 *%src) { 82 ; CHECK-LABEL: f8: 83 ; CHECK: llh %r2, -524288(%r2) 84 ; CHECK: br %r14 85 %ptr = getelementptr i16, i16 *%src, i64 -262144 86 %half = load i16 , i16 *%ptr 87 %ext = zext i16 %half to i32 88 ret i32 %ext 89 } 90 91 ; Check the next halfword down, which needs separate address logic. 92 ; Other sequences besides this one would be OK. 93 define i32 @f9(i16 *%src) { 94 ; CHECK-LABEL: f9: 95 ; CHECK: agfi %r2, -524290 96 ; CHECK: llh %r2, 0(%r2) 97 ; CHECK: br %r14 98 %ptr = getelementptr i16, i16 *%src, i64 -262145 99 %half = load i16 , i16 *%ptr 100 %ext = zext i16 %half to i32 101 ret i32 %ext 102 } 103 104 ; Check that LLH allows an index 105 define i32 @f10(i64 %src, i64 %index) { 106 ; CHECK-LABEL: f10: 107 ; CHECK: llh %r2, 524287(%r3,%r2) 108 ; CHECK: br %r14 109 %add1 = add i64 %src, %index 110 %add2 = add i64 %add1, 524287 111 %ptr = inttoptr i64 %add2 to i16 * 112 %half = load i16 , i16 *%ptr 113 %ext = zext i16 %half to i32 114 ret i32 %ext 115 } 116 117 ; Test a case where we spill the source of at least one LLHR. We want 118 ; to use LLH if possible. 119 define void @f11(i32 *%ptr) { 120 ; CHECK-LABEL: f11: 121 ; CHECK: llh {{%r[0-9]+}}, 16{{[26]}}(%r15) 122 ; CHECK: br %r14 123 %val0 = load volatile i32 , i32 *%ptr 124 %val1 = load volatile i32 , i32 *%ptr 125 %val2 = load volatile i32 , i32 *%ptr 126 %val3 = load volatile i32 , i32 *%ptr 127 %val4 = load volatile i32 , i32 *%ptr 128 %val5 = load volatile i32 , i32 *%ptr 129 %val6 = load volatile i32 , i32 *%ptr 130 %val7 = load volatile i32 , i32 *%ptr 131 %val8 = load volatile i32 , i32 *%ptr 132 %val9 = load volatile i32 , i32 *%ptr 133 %val10 = load volatile i32 , i32 *%ptr 134 %val11 = load volatile i32 , i32 *%ptr 135 %val12 = load volatile i32 , i32 *%ptr 136 %val13 = load volatile i32 , i32 *%ptr 137 %val14 = load volatile i32 , i32 *%ptr 138 %val15 = load volatile i32 , i32 *%ptr 139 140 %trunc0 = trunc i32 %val0 to i16 141 %trunc1 = trunc i32 %val1 to i16 142 %trunc2 = trunc i32 %val2 to i16 143 %trunc3 = trunc i32 %val3 to i16 144 %trunc4 = trunc i32 %val4 to i16 145 %trunc5 = trunc i32 %val5 to i16 146 %trunc6 = trunc i32 %val6 to i16 147 %trunc7 = trunc i32 %val7 to i16 148 %trunc8 = trunc i32 %val8 to i16 149 %trunc9 = trunc i32 %val9 to i16 150 %trunc10 = trunc i32 %val10 to i16 151 %trunc11 = trunc i32 %val11 to i16 152 %trunc12 = trunc i32 %val12 to i16 153 %trunc13 = trunc i32 %val13 to i16 154 %trunc14 = trunc i32 %val14 to i16 155 %trunc15 = trunc i32 %val15 to i16 156 157 %ext0 = zext i16 %trunc0 to i32 158 %ext1 = zext i16 %trunc1 to i32 159 %ext2 = zext i16 %trunc2 to i32 160 %ext3 = zext i16 %trunc3 to i32 161 %ext4 = zext i16 %trunc4 to i32 162 %ext5 = zext i16 %trunc5 to i32 163 %ext6 = zext i16 %trunc6 to i32 164 %ext7 = zext i16 %trunc7 to i32 165 %ext8 = zext i16 %trunc8 to i32 166 %ext9 = zext i16 %trunc9 to i32 167 %ext10 = zext i16 %trunc10 to i32 168 %ext11 = zext i16 %trunc11 to i32 169 %ext12 = zext i16 %trunc12 to i32 170 %ext13 = zext i16 %trunc13 to i32 171 %ext14 = zext i16 %trunc14 to i32 172 %ext15 = zext i16 %trunc15 to i32 173 174 store volatile i32 %val0, i32 *%ptr 175 store volatile i32 %val1, i32 *%ptr 176 store volatile i32 %val2, i32 *%ptr 177 store volatile i32 %val3, i32 *%ptr 178 store volatile i32 %val4, i32 *%ptr 179 store volatile i32 %val5, i32 *%ptr 180 store volatile i32 %val6, i32 *%ptr 181 store volatile i32 %val7, i32 *%ptr 182 store volatile i32 %val8, i32 *%ptr 183 store volatile i32 %val9, i32 *%ptr 184 store volatile i32 %val10, i32 *%ptr 185 store volatile i32 %val11, i32 *%ptr 186 store volatile i32 %val12, i32 *%ptr 187 store volatile i32 %val13, i32 *%ptr 188 store volatile i32 %val14, i32 *%ptr 189 store volatile i32 %val15, i32 *%ptr 190 191 store volatile i32 %ext0, i32 *%ptr 192 store volatile i32 %ext1, i32 *%ptr 193 store volatile i32 %ext2, i32 *%ptr 194 store volatile i32 %ext3, i32 *%ptr 195 store volatile i32 %ext4, i32 *%ptr 196 store volatile i32 %ext5, i32 *%ptr 197 store volatile i32 %ext6, i32 *%ptr 198 store volatile i32 %ext7, i32 *%ptr 199 store volatile i32 %ext8, i32 *%ptr 200 store volatile i32 %ext9, i32 *%ptr 201 store volatile i32 %ext10, i32 *%ptr 202 store volatile i32 %ext11, i32 *%ptr 203 store volatile i32 %ext12, i32 *%ptr 204 store volatile i32 %ext13, i32 *%ptr 205 store volatile i32 %ext14, i32 *%ptr 206 store volatile i32 %ext15, i32 *%ptr 207 208 ret void 209 } 210
