1 ; Test sign extensions from an i32 to an i64. 2 ; 3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s 4 5 ; Test register extension, starting with an i32. 6 define i64 @f1(i32 %a) { 7 ; CHECK-LABEL: f1: 8 ; CHECK: lgfr %r2, %r2 9 ; CHECK: br %r14 10 %ext = sext i32 %a to i64 11 ret i64 %ext 12 } 13 14 ; ...and again with an i64. 15 define i64 @f2(i64 %a) { 16 ; CHECK-LABEL: f2: 17 ; CHECK: lgfr %r2, %r2 18 ; CHECK: br %r14 19 %word = trunc i64 %a to i32 20 %ext = sext i32 %word to i64 21 ret i64 %ext 22 } 23 24 ; Check LGF with no displacement. 25 define i64 @f3(i32 *%src) { 26 ; CHECK-LABEL: f3: 27 ; CHECK: lgf %r2, 0(%r2) 28 ; CHECK: br %r14 29 %word = load i32 , i32 *%src 30 %ext = sext i32 %word to i64 31 ret i64 %ext 32 } 33 34 ; Check the high end of the LGF range. 35 define i64 @f4(i32 *%src) { 36 ; CHECK-LABEL: f4: 37 ; CHECK: lgf %r2, 524284(%r2) 38 ; CHECK: br %r14 39 %ptr = getelementptr i32, i32 *%src, i64 131071 40 %word = load i32 , i32 *%ptr 41 %ext = sext i32 %word to i64 42 ret i64 %ext 43 } 44 45 ; Check the next word up, which needs separate address logic. 46 ; Other sequences besides this one would be OK. 47 define i64 @f5(i32 *%src) { 48 ; CHECK-LABEL: f5: 49 ; CHECK: agfi %r2, 524288 50 ; CHECK: lgf %r2, 0(%r2) 51 ; CHECK: br %r14 52 %ptr = getelementptr i32, i32 *%src, i64 131072 53 %word = load i32 , i32 *%ptr 54 %ext = sext i32 %word to i64 55 ret i64 %ext 56 } 57 58 ; Check the high end of the negative LGF range. 59 define i64 @f6(i32 *%src) { 60 ; CHECK-LABEL: f6: 61 ; CHECK: lgf %r2, -4(%r2) 62 ; CHECK: br %r14 63 %ptr = getelementptr i32, i32 *%src, i64 -1 64 %word = load i32 , i32 *%ptr 65 %ext = sext i32 %word to i64 66 ret i64 %ext 67 } 68 69 ; Check the low end of the LGF range. 70 define i64 @f7(i32 *%src) { 71 ; CHECK-LABEL: f7: 72 ; CHECK: lgf %r2, -524288(%r2) 73 ; CHECK: br %r14 74 %ptr = getelementptr i32, i32 *%src, i64 -131072 75 %word = load i32 , i32 *%ptr 76 %ext = sext i32 %word to i64 77 ret i64 %ext 78 } 79 80 ; Check the next word down, which needs separate address logic. 81 ; Other sequences besides this one would be OK. 82 define i64 @f8(i32 *%src) { 83 ; CHECK-LABEL: f8: 84 ; CHECK: agfi %r2, -524292 85 ; CHECK: lgf %r2, 0(%r2) 86 ; CHECK: br %r14 87 %ptr = getelementptr i32, i32 *%src, i64 -131073 88 %word = load i32 , i32 *%ptr 89 %ext = sext i32 %word to i64 90 ret i64 %ext 91 } 92 93 ; Check that LGF allows an index. 94 define i64 @f9(i64 %src, i64 %index) { 95 ; CHECK-LABEL: f9: 96 ; CHECK: lgf %r2, 524287(%r3,%r2) 97 ; CHECK: br %r14 98 %add1 = add i64 %src, %index 99 %add2 = add i64 %add1, 524287 100 %ptr = inttoptr i64 %add2 to i32 * 101 %word = load i32 , i32 *%ptr 102 %ext = sext i32 %word to i64 103 ret i64 %ext 104 } 105
