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      1 ; Test vector AND-NOT.
      2 ;
      3 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
      4 
      5 ; Test a v16i8 AND-NOT.
      6 define <16 x i8> @f1(<16 x i8> %dummy, <16 x i8> %val1, <16 x i8> %val2) {
      7 ; CHECK-LABEL: f1:
      8 ; CHECK: vnc %v24, %v26, %v28
      9 ; CHECK: br %r14
     10   %not = xor <16 x i8> %val2, <i8 -1, i8 -1, i8 -1, i8 -1,
     11                                i8 -1, i8 -1, i8 -1, i8 -1,
     12                                i8 -1, i8 -1, i8 -1, i8 -1,
     13                                i8 -1, i8 -1, i8 -1, i8 -1>
     14   %ret = and <16 x i8> %val1, %not
     15   ret <16 x i8> %ret
     16 }
     17 
     18 ; ...and again with the reverse.
     19 define <16 x i8> @f2(<16 x i8> %dummy, <16 x i8> %val1, <16 x i8> %val2) {
     20 ; CHECK-LABEL: f2:
     21 ; CHECK: vnc %v24, %v28, %v26
     22 ; CHECK: br %r14
     23   %not = xor <16 x i8> %val1, <i8 -1, i8 -1, i8 -1, i8 -1,
     24                                i8 -1, i8 -1, i8 -1, i8 -1,
     25                                i8 -1, i8 -1, i8 -1, i8 -1,
     26                                i8 -1, i8 -1, i8 -1, i8 -1>
     27   %ret = and <16 x i8> %not, %val2
     28   ret <16 x i8> %ret
     29 }
     30 
     31 ; Test a v8i16 AND-NOT.
     32 define <8 x i16> @f3(<8 x i16> %dummy, <8 x i16> %val1, <8 x i16> %val2) {
     33 ; CHECK-LABEL: f3:
     34 ; CHECK: vnc %v24, %v26, %v28
     35 ; CHECK: br %r14
     36   %not = xor <8 x i16> %val2, <i16 -1, i16 -1, i16 -1, i16 -1,
     37                                i16 -1, i16 -1, i16 -1, i16 -1>
     38   %ret = and <8 x i16> %val1, %not
     39   ret <8 x i16> %ret
     40 }
     41 
     42 ; ...and again with the reverse.
     43 define <8 x i16> @f4(<8 x i16> %dummy, <8 x i16> %val1, <8 x i16> %val2) {
     44 ; CHECK-LABEL: f4:
     45 ; CHECK: vnc %v24, %v28, %v26
     46 ; CHECK: br %r14
     47   %not = xor <8 x i16> %val1, <i16 -1, i16 -1, i16 -1, i16 -1,
     48                                i16 -1, i16 -1, i16 -1, i16 -1>
     49   %ret = and <8 x i16> %not, %val2
     50   ret <8 x i16> %ret
     51 }
     52 
     53 ; Test a v4i32 AND-NOT.
     54 define <4 x i32> @f5(<4 x i32> %dummy, <4 x i32> %val1, <4 x i32> %val2) {
     55 ; CHECK-LABEL: f5:
     56 ; CHECK: vnc %v24, %v26, %v28
     57 ; CHECK: br %r14
     58   %not = xor <4 x i32> %val2, <i32 -1, i32 -1, i32 -1, i32 -1>
     59   %ret = and <4 x i32> %val1, %not
     60   ret <4 x i32> %ret
     61 }
     62 
     63 ; ...and again with the reverse.
     64 define <4 x i32> @f6(<4 x i32> %dummy, <4 x i32> %val1, <4 x i32> %val2) {
     65 ; CHECK-LABEL: f6:
     66 ; CHECK: vnc %v24, %v28, %v26
     67 ; CHECK: br %r14
     68   %not = xor <4 x i32> %val1, <i32 -1, i32 -1, i32 -1, i32 -1>
     69   %ret = and <4 x i32> %not, %val2
     70   ret <4 x i32> %ret
     71 }
     72 
     73 ; Test a v2i64 AND-NOT.
     74 define <2 x i64> @f7(<2 x i64> %dummy, <2 x i64> %val1, <2 x i64> %val2) {
     75 ; CHECK-LABEL: f7:
     76 ; CHECK: vnc %v24, %v26, %v28
     77 ; CHECK: br %r14
     78   %not = xor <2 x i64> %val2, <i64 -1, i64 -1>
     79   %ret = and <2 x i64> %val1, %not
     80   ret <2 x i64> %ret
     81 }
     82 
     83 ; ...and again with the reverse.
     84 define <2 x i64> @f8(<2 x i64> %dummy, <2 x i64> %val1, <2 x i64> %val2) {
     85 ; CHECK-LABEL: f8:
     86 ; CHECK: vnc %v24, %v28, %v26
     87 ; CHECK: br %r14
     88   %not = xor <2 x i64> %val1, <i64 -1, i64 -1>
     89   %ret = and <2 x i64> %not, %val2
     90   ret <2 x i64> %ret
     91 }
     92