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      1 ; Test the handling of named vector arguments.
      2 ;
      3 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s -check-prefix=CHECK-VEC
      4 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s -check-prefix=CHECK-STACK
      5 
      6 ; This routine has 6 integer arguments, which fill up r2-r5 and
      7 ; the stack slot at offset 160, and 10 vector arguments, which
      8 ; fill up v24-v31 and the two double-wide stack slots at 168
      9 ; and 184.
     10 declare void @bar(i64, i64, i64, i64, i64, i64,
     11                   <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>,
     12                   <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>,
     13                   <4 x i32>, <4 x i32>)
     14 
     15 define void @foo() {
     16 ; CHECK-VEC-LABEL: foo:
     17 ; CHECK-VEC-DAG: vrepif %v24, 1
     18 ; CHECK-VEC-DAG: vrepif %v26, 2
     19 ; CHECK-VEC-DAG: vrepif %v28, 3
     20 ; CHECK-VEC-DAG: vrepif %v30, 4
     21 ; CHECK-VEC-DAG: vrepif %v25, 5
     22 ; CHECK-VEC-DAG: vrepif %v27, 6
     23 ; CHECK-VEC-DAG: vrepif %v29, 7
     24 ; CHECK-VEC-DAG: vrepif %v31, 8
     25 ; CHECK-VEC: brasl %r14, bar@PLT
     26 ;
     27 ; CHECK-STACK-LABEL: foo:
     28 ; CHECK-STACK: aghi %r15, -200
     29 ; CHECK-STACK-DAG: mvghi 160(%r15), 6
     30 ; CHECK-STACK-DAG: vrepif [[REG1:%v[0-9]+]], 9
     31 ; CHECK-STACK-DAG: vst [[REG1]], 168(%r15)
     32 ; CHECK-STACK-DAG: vrepif [[REG2:%v[0-9]+]], 10
     33 ; CHECK-STACK-DAG: vst [[REG2]], 184(%r15)
     34 ; CHECK-STACK: brasl %r14, bar@PLT
     35 
     36   call void @bar (i64 1, i64 2, i64 3, i64 4, i64 5, i64 6,
     37                   <4 x i32> <i32 1, i32 1, i32 1, i32 1>,
     38                   <4 x i32> <i32 2, i32 2, i32 2, i32 2>,
     39                   <4 x i32> <i32 3, i32 3, i32 3, i32 3>,
     40                   <4 x i32> <i32 4, i32 4, i32 4, i32 4>,
     41                   <4 x i32> <i32 5, i32 5, i32 5, i32 5>,
     42                   <4 x i32> <i32 6, i32 6, i32 6, i32 6>,
     43                   <4 x i32> <i32 7, i32 7, i32 7, i32 7>,
     44                   <4 x i32> <i32 8, i32 8, i32 8, i32 8>,
     45                   <4 x i32> <i32 9, i32 9, i32 9, i32 9>,
     46                   <4 x i32> <i32 10, i32 10, i32 10, i32 10>)
     47   ret void
     48 }
     49